From: Johan Hovold <johan@kernel.org>
To: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
kishon@kernel.org, neil.armstrong@linaro.org,
abel.vesa@linaro.org, kw@linux.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v3 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings
Date: Fri, 27 Jun 2025 11:27:09 +0200 [thread overview]
Message-ID: <aF5j7VqX5oU11cWe@hovoldconsulting.com> (raw)
In-Reply-To: <20250625090048.624399-2-quic_ziyuzhan@quicinc.com>
On Wed, Jun 25, 2025 at 05:00:45PM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is required by the PCIe controller but not by the PCIe
> PHY. In PCIe PHY, the source of aux_clk used in low-power mode should
> be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with
> gcc_phy_aux_clk.
>
> Removed the phy_aux clock from the PCIe PHY binding as it is no longer
> used by any instance.
Please add the Fixes tags I mentioned earlier which identifies the
commits that added the bogus clock.
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
> ---
> .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> index 2c6c9296e4c0..57b16444eb0e 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> @@ -54,7 +54,7 @@ properties:
>
> clocks:
> minItems: 5
> - maxItems: 7
> + maxItems: 6
You remove the last user of the bogus clock (qcs8300) in a separate
series so you should keep it until then.
> clock-names:
> minItems: 5
> @@ -65,7 +65,6 @@ properties:
> - enum: [rchng, refgen]
> - const: pipe
> - const: pipediv2
> - - const: phy_aux
>
> power-domains:
> maxItems: 1
> @@ -176,6 +175,8 @@ allOf:
> contains:
> enum:
> - qcom,qcs615-qmp-gen3x1-pcie-phy
> + - qcom,sa8775p-qmp-gen4x2-pcie-phy
> + - qcom,sa8775p-qmp-gen4x4-pcie-phy
> - qcom,sc8280xp-qmp-gen3x1-pcie-phy
> - qcom,sc8280xp-qmp-gen3x2-pcie-phy
> - qcom,sc8280xp-qmp-gen3x4-pcie-phy
> @@ -197,8 +198,6 @@ allOf:
> contains:
> enum:
> - qcom,qcs8300-qmp-gen4x2-pcie-phy
^
> - - qcom,sa8775p-qmp-gen4x2-pcie-phy
> - - qcom,sa8775p-qmp-gen4x4-pcie-phy
Johan
next prev parent reply other threads:[~2025-06-27 9:27 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 9:00 [PATCH v3 0/4] pci: qcom: drop unrelated clock and add link_down reset for sa8775p Ziyue Zhang
2025-06-25 9:00 ` [PATCH v3 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings Ziyue Zhang
2025-06-27 9:27 ` Johan Hovold [this message]
2025-06-25 9:00 ` [PATCH v3 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset Ziyue Zhang
2025-06-27 7:08 ` Krzysztof Kozlowski
2025-07-11 8:26 ` Ziyue Zhang
2025-07-11 8:44 ` Krzysztof Kozlowski
2025-07-11 9:57 ` Konrad Dybcio
2025-06-27 9:28 ` Johan Hovold
2025-06-25 9:00 ` [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy Ziyue Zhang
2025-06-27 14:50 ` Konrad Dybcio
2025-07-10 9:43 ` Johan Hovold
2025-07-10 10:24 ` Ziyue Zhang
2025-07-10 10:44 ` Johan Hovold
2025-07-15 11:47 ` Konrad Dybcio
2025-06-25 9:00 ` [PATCH v3 4/4] arm64: dts: qcom: sa8775p: add link_down reset for pcie Ziyue Zhang
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