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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?Vu0gms5GYlxKN0tLTf1x5eVeDzmGwa04plYELbEidKPGFLbXD6eSga2ibmif?= =?us-ascii?Q?BF2ciHBQx2iRHi+xc6tY/nFxN0wob/8M2GSOaXc/Y+3J42gqIqUKs9pwRciU?= =?us-ascii?Q?rjB1oXIXmXWvLU7tnA+rtr8Yc48w+IbNnb8IPHi2uSnzS+sxtNsMaALygtMs?= =?us-ascii?Q?uPuQpAtKQtuXBbTrfLBeg6hQ4tP/71PF0zqRBTtQ/HBU0f0BG8/eUOeXcI68?= =?us-ascii?Q?euP6IKGu+A/IUiSM0Vo9vSncxLopJz0zY8GkSOkDVwTP9vy8lPdfN/Gnosy8?= =?us-ascii?Q?vG2kQqIaMq8XcUlqmcVNuuSJD6yfGa0lLZMIy3o6kTmpVvbAVExNXbXmXl+x?= =?us-ascii?Q?pHPHwNJEM4E1/zW38/0lJlOcG+pJaQvdiVSW2QX4YBSTNv12DhqXtH096Nwo?= =?us-ascii?Q?kFY6pIJczKbj+Y5hCK9ZV4xVY7jGTh/8rXkYPpb2jgMgwQ3t1O8PAcimCR4g?= =?us-ascii?Q?zzRfuvagXkUVQxPbuYhV/pbYFwbh9zNIAM8EdUTZA1wcE37nvYy2KKt+E+2V?= =?us-ascii?Q?JCbYZkSqdDfMZasjS/B5tK9WML3bhwLP6u8tGela0ru7kD45Dbs9ebClSxKl?= =?us-ascii?Q?nsweqNtNXrPSLhCHhdVGTbHceOJOutQZ0R+sCmbwrswcZkCXiYbWPqO/b9hj?= =?us-ascii?Q?NVwgAvMgZTRLLx+YJXvpaRLTSJ/ch9143jB0LaHX22W4ZLzTYbmB8axYwZxW?= =?us-ascii?Q?XiwzqK/8jfCm3Mt9rux0ecXawwpPuDVZT0X2Uy4bfzxbZSNbGChMB/CtDot4?= =?us-ascii?Q?K7OiC4IjLE39Rn6fBc3EKDFy40D8NMAGLAn6x+OY3Nd7pERQ3MtwVvdnh0EE?= =?us-ascii?Q?Dkb1P/eqQEMLupt8kl3OKVJy8vnAuTU0xtrmp9q7f30FwgQK0d3E+fV2sJM1?= =?us-ascii?Q?uN/5YSW56fyu18eKxeHQsN9m5yR5/E5TGmf+GtbMuR3nHgWXEeU7s3WWeaCh?= =?us-ascii?Q?GDmG9bg84Evjwns07vYvGGiAQoKOmE47oc0soS6OX8lMs6kuAlsFpqvCrhe1?= =?us-ascii?Q?l7HOaizFDhLMYZBGNMjeFge1mt3I2j0TaSRQUnEtCQzynoLS0wTc7v0EHYi2?= =?us-ascii?Q?FMfA+sZ0vFeV7Rsk+AM8H/OWlPoGOXMbMSpSqk6qo/pSPiiKsHN01lCNmyrd?= =?us-ascii?Q?PQUw/AJRbQG/p3ugio2JdQTzbuQjqastxV4xJ/ld588jdIL3FSSNKA2f2f4Z?= =?us-ascii?Q?ptSAQjkNXCo6IyhOm8PJUw8DbbBUeV2xX8AXt8o7lwB/wNjO9mbkyyq7NDXz?= =?us-ascii?Q?b009F+yZ52dDZTXAqG9Jmi+j2Q5YSy84Ce78szf4C/iGhZnPRYAnIrVblya3?= =?us-ascii?Q?9dd8npnVXAnbrPuS4hVYH6+4vHr6uBHUFIyifUhJpsRGNNZLH+u1Qo9N7Xqc?= =?us-ascii?Q?quBWny/yVUxqKBLfx2dYxbcmWgg6IcNdPEnD6e+4Sxljmz1bNboKnyUwmMIG?= =?us-ascii?Q?jPgPXsNa2rQ3Xx99a5kGftrmw2UUTsj6VXHuX29PhrOpfUeUYKH4tIycCrvP?= =?us-ascii?Q?+RT51e9DrqIorBtcvfFVtv6wmpqoPfmaCcRNWGXO9FpT/MbW3PPo/L0IaiFo?= =?us-ascii?Q?kF5rwd3m7EV+ut6tfo8jMCXIg56ZeGWqlZ/jVAmC?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: cd50b99d-83a1-4466-7e0a-08ddb3380138 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2025 15:58:47.7950 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AzkAXrWOdBq9SfPza1N27O9SxdW2dOPqrK0n0pa55KvRn9GTSsMHmZ6ZCj2rqnAwoAYt+waBdme56PqDxWJWGA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB9232 On Tue, Jun 24, 2025 at 11:35:31AM +0100, James Clark wrote: > In target mode, extra interrupts can be received between the end of a > transfer and halting the module if the host continues sending more data. > If the interrupt from this occurs after the reinit_completion() then the > completion counter is left at a non-zero value. The next unrelated > transfer initiated by userspace will then complete immediately without > waiting for the interrupt or writing to the RX buffer. > > Fix it by resetting the counter before the transfer so that lingering > values are cleared. This is done after clearing the FIFOs and the > status register but before the transfer is initiated, so no interrupts > should be received at this point resulting in other race conditions. > > Fixes: 4f5ee75ea171 ("spi: spi-fsl-dspi: Replace interruptible wait queue with a simple completion") > Signed-off-by: James Clark > --- > drivers/spi/spi-fsl-dspi.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c > index 04c88d090c4d..744dfc561db2 100644 > --- a/drivers/spi/spi-fsl-dspi.c > +++ b/drivers/spi/spi-fsl-dspi.c > @@ -1122,11 +1122,19 @@ static int dspi_transfer_one_message(struct spi_controller *ctlr, > if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { > status = dspi_dma_xfer(dspi); > } else { > + /* > + * Reset completion counter to clear any extra > + * complete()s from spurious interrupts that may have > + * happened after the last message's completion but > + * before the module was fully in stop mode. > + */ I think you change is correct. reinit_completion() should be called before dspi_fifo_write(). comments is quite confused. how about below comments? /* * Reinitialize the completion before transferring data to avoid the case where * it might remain in the done state due to a spurious interrupt from a previous * transfer. This could falsely signal that the current transfer has completed. */ Frank > + if (dspi->irq) > + reinit_completion(&dspi->xfer_done); > + > dspi_fifo_write(dspi); > > if (dspi->irq) { > wait_for_completion(&dspi->xfer_done); > - reinit_completion(&dspi->xfer_done); > } else { > do { > status = dspi_poll(dspi); > > -- > 2.34.1 >