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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?F7RsOF16tILKh6ygjydHsxP/ZWJAtPM5/w1nTBACyADNek7F7WEFcjM3C+Q/?= =?us-ascii?Q?8ev9MTZlJagTW3kmA8Hab+6VRA/tCzd5mkNjFmTiVvlMZgh453gdeFZy7/Js?= =?us-ascii?Q?O2yOKj4IiZyzzcAPYyJqy/DCex7ShK8IvK0R0F1I0b35IrW/53T6SI+1GNvK?= =?us-ascii?Q?m/HtrzNSpyjoi05LHj8XAOVnEQjGirh+sJ86Zvr9VMDdoiCjUSryj2cEE9gd?= =?us-ascii?Q?nRjyhEZVE6XMEMp61gxXh5kG5NKx9ZvwklTHtlZtHyL+5N1+ViTzO+FjyLbP?= =?us-ascii?Q?VO9/gIW8t5k28CTt07IgI25GtKm2LUG/IYGbYhJqStJa0IdAVcqLeHOHoQoe?= =?us-ascii?Q?gA6QH0RupTXwPasS9oTk4HeDEe9foa+Z0ypAnB93Jks0YRhAICGGwxgnJBka?= =?us-ascii?Q?wcQSGN8w5T0h5QdSZ/EAu4pvLaCwT/DVN1inC9lkfOFvA0SFBQcqbuQJP8w1?= =?us-ascii?Q?1hbWa4i6y7QucAnUjK4eU50pzPKtcjGwmwI8PU0+x0lpgs17TVrg5W6MTVLY?= =?us-ascii?Q?/PnsGBZQmGUg8rlMBgA0xhJM0+HfLlNifl81Mgb6YRrr4ss5ufVrxt6Y8WMz?= =?us-ascii?Q?WviZyvgPeQA/qh8Wr3+MSkWO/QjSAE3wLHUzuVZKcOSjNJgedQZUGaYRjHl6?= =?us-ascii?Q?MDJa7gqlY7Xoz/9rg61BpiD+Buf+i7WPanrtHcFaQI+XYyHKyhyL8PE3+fqi?= =?us-ascii?Q?Nu4OSZCvMTdtb0Lc3tnOSeDIZWBUPY07N3ktQGo6xAaYfqhSRfuJgdzoLWPR?= =?us-ascii?Q?4G3+xjYaiQvkIPSeKS3YyblkTU+dCp6ktf0Z2FLLPtD3I2Lyu9CrzrIKCylO?= =?us-ascii?Q?eq2+HHeVr6IsNpxyJelMNr8enQdAV54sHI0/h4G4O3tWBgN//p+zrJK14PL0?= =?us-ascii?Q?2cT5yOPsMvtcPwwOGL3DBkA0i0gveg6d6BooiObX4z+8xfHu5OMwbog5jsWW?= =?us-ascii?Q?J5n7vSd7RgoOW9hPFsqTEJ9GzRZxLsCeUNFoBbuYQ0XjkZo410JTa8jcGQP2?= =?us-ascii?Q?SwSUyJIJu6Qbe1Ji08rzewwd5xRJLNtnBg/7BvbMyI44l2CEeBdqrJxiiu8/?= =?us-ascii?Q?ERLIgwOudU7/ppgWYHUIihl5btK+b2BayrQP+XLQGsRUByBUOADXcgspzuF6?= =?us-ascii?Q?6BsBnScSFgd5YLYwFLMlz6vGyU29g+8m0QHomsdhNNf2T6YjO/NLtKyalozQ?= =?us-ascii?Q?O0c1mtD9VnjhE37CKLFBxnwTmuTTD/RanSI+PSASOPNgWkrkCOieVsfxyDI4?= =?us-ascii?Q?Z2zassO/YtKsHdeISh8QtEmtml7zc2ny/mFcHcH/Fa919rTaiF6rc5kgIxA3?= =?us-ascii?Q?BxmTMDP2/ujDrm1wBDbtPOxJv4VMOSyIT2621dlEeKojSXwi8KXG0opcBePq?= =?us-ascii?Q?fslN57wsxj6ItuUxZIexSz43B5bIs+vhPcUOYNFi3IpByojhevW72LmCFfCo?= =?us-ascii?Q?sKil/b2zLGHxFs68W5P+pNOfW9riLtN/llSPrfzoGmMKABKo5+vC5h4KG7wP?= =?us-ascii?Q?Yqw2gNP6Dr+WjeOLz9mQkCtbt5PjjeQE8VTCVNqWU8AzdpmXcnK6TDWdAWLm?= =?us-ascii?Q?v0y0lrFCiDnEskZyWeQy9pSDbjsGGegmqz3Zk+7a?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 19c3abdb-9689-4a96-61a3-08ddb359cded X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2025 20:00:44.7619 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: GiPCG4uQ9sAQ4fW68ZKfL9S0W0TPFQ2eRZ+JI9GwUi2l+CTjG5AyonbpmT3VphpiaE7Zn1kXfDTABJrc3MuUwQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR04MB7899 On Tue, Jun 24, 2025 at 06:06:16PM +0200, Jerome Brunet wrote: > The NTB epf host driver assumes the BAR number associated with a memory > window is just incremented from the BAR number associated with MW1. This > seems to have been enough so far but this is not really how the endpoint > side work and the two could easily become mis-aligned. > > ntb_epf_mw_to_bar() even assumes that the BAR number is the memory window > index + 2, which means the function only returns a proper result if BAR_2 > is associated with MW1. > > Instead, fully describe and allow arbitrary NTB BAR mapping. > > Signed-off-by: Jerome Brunet > --- > drivers/ntb/hw/epf/ntb_hw_epf.c | 105 +++++++++++++++++++++------------------- > 1 file changed, 54 insertions(+), 51 deletions(-) > > diff --git a/drivers/ntb/hw/epf/ntb_hw_epf.c b/drivers/ntb/hw/epf/ntb_hw_epf.c > index 00f0e78f685bf7917b02dd8a52b5b35f68d5bb64..e8eb3adc6cecd2d52235a3f0b6b5a59ec58f1d73 100644 > --- a/drivers/ntb/hw/epf/ntb_hw_epf.c > +++ b/drivers/ntb/hw/epf/ntb_hw_epf.c > @@ -49,6 +49,7 @@ > #define NTB_EPF_COMMAND_TIMEOUT 1000 /* 1 Sec */ > > enum pci_barno { > + NO_BAR = -1, > BAR_0, > BAR_1, > BAR_2, > @@ -57,16 +58,26 @@ enum pci_barno { > BAR_5, > }; > > +enum epf_ntb_bar { > + BAR_CONFIG, > + BAR_PEER_SPAD, > + BAR_DB, > + BAR_MW1, > + BAR_MW2, > + BAR_MW3, > + BAR_MW4, > + NTB_BAR_NUM, > +}; > + > +#define NTB_EPF_MAX_MW_COUNT (NTB_BAR_NUM - BAR_MW1) > + > struct ntb_epf_dev { > struct ntb_dev ntb; > struct device *dev; > /* Mutex to protect providing commands to NTB EPF */ > struct mutex cmd_lock; > > - enum pci_barno ctrl_reg_bar; > - enum pci_barno peer_spad_reg_bar; > - enum pci_barno db_reg_bar; > - enum pci_barno mw_bar; > + const enum pci_barno *barno_map; > > unsigned int mw_count; > unsigned int spad_count; > @@ -85,17 +96,6 @@ struct ntb_epf_dev { > > #define ntb_ndev(__ntb) container_of(__ntb, struct ntb_epf_dev, ntb) > > -struct ntb_epf_data { > - /* BAR that contains both control region and self spad region */ > - enum pci_barno ctrl_reg_bar; > - /* BAR that contains peer spad region */ > - enum pci_barno peer_spad_reg_bar; > - /* BAR that contains Doorbell region and Memory window '1' */ > - enum pci_barno db_reg_bar; > - /* BAR that contains memory windows*/ > - enum pci_barno mw_bar; > -}; > - > static int ntb_epf_send_command(struct ntb_epf_dev *ndev, u32 command, > u32 argument) > { > @@ -144,7 +144,7 @@ static int ntb_epf_mw_to_bar(struct ntb_epf_dev *ndev, int idx) > return -EINVAL; > } > > - return idx + 2; > + return ndev->barno_map[BAR_MW1 + idx]; > } > > static int ntb_epf_mw_count(struct ntb_dev *ntb, int pidx) > @@ -413,7 +413,9 @@ static int ntb_epf_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx, > return -EINVAL; > } > > - bar = idx + ndev->mw_bar; > + bar = ntb_epf_mw_to_bar(ndev, idx); > + if (bar < 0) > + return bar; > > mw_size = pci_resource_len(ntb->pdev, bar); > > @@ -455,7 +457,9 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx, > if (idx == 0) > offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET); > > - bar = idx + ndev->mw_bar; > + bar = ntb_epf_mw_to_bar(ndev, idx); > + if (bar < 0) > + return bar; > > if (base) > *base = pci_resource_start(ndev->ntb.pdev, bar) + offset; > @@ -557,8 +561,13 @@ static int ntb_epf_init_dev(struct ntb_epf_dev *ndev) > } > > ndev->db_valid_mask = BIT_ULL(ndev->db_count) - 1; > - ndev->mw_count = readl(ndev->ctrl_reg + NTB_EPF_MW_COUNT); > ndev->spad_count = readl(ndev->ctrl_reg + NTB_EPF_SPAD_COUNT); > + ndev->mw_count = readl(ndev->ctrl_reg + NTB_EPF_MW_COUNT); This looks like just move readl() pos, not related this patch. Frank > + > + if (ndev->mw_count > NTB_EPF_MAX_MW_COUNT) { > + dev_err(dev, "Unsupported MW count: %u\n", ndev->mw_count); > + return -EINVAL; > + } > > return 0; > } > @@ -596,14 +605,15 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev, > dev_warn(&pdev->dev, "Cannot DMA highmem\n"); > } > > - ndev->ctrl_reg = pci_iomap(pdev, ndev->ctrl_reg_bar, 0); > + ndev->ctrl_reg = pci_iomap(pdev, ndev->barno_map[BAR_CONFIG], 0); > if (!ndev->ctrl_reg) { > ret = -EIO; > goto err_pci_regions; > } > > - if (ndev->peer_spad_reg_bar) { > - ndev->peer_spad_reg = pci_iomap(pdev, ndev->peer_spad_reg_bar, 0); > + if (ndev->barno_map[BAR_PEER_SPAD] != ndev->barno_map[BAR_CONFIG]) { > + ndev->peer_spad_reg = pci_iomap(pdev, > + ndev->barno_map[BAR_PEER_SPAD], 0); > if (!ndev->peer_spad_reg) { > ret = -EIO; > goto err_pci_regions; > @@ -614,7 +624,7 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev, > ndev->peer_spad_reg = ndev->ctrl_reg + spad_off + spad_sz; > } > > - ndev->db_reg = pci_iomap(pdev, ndev->db_reg_bar, 0); > + ndev->db_reg = pci_iomap(pdev, ndev->barno_map[BAR_DB], 0); > if (!ndev->db_reg) { > ret = -EIO; > goto err_pci_regions; > @@ -659,12 +669,7 @@ static void ntb_epf_cleanup_isr(struct ntb_epf_dev *ndev) > static int ntb_epf_pci_probe(struct pci_dev *pdev, > const struct pci_device_id *id) > { > - enum pci_barno peer_spad_reg_bar = BAR_1; > - enum pci_barno ctrl_reg_bar = BAR_0; > - enum pci_barno db_reg_bar = BAR_2; > - enum pci_barno mw_bar = BAR_2; > struct device *dev = &pdev->dev; > - struct ntb_epf_data *data; > struct ntb_epf_dev *ndev; > int ret; > > @@ -675,18 +680,10 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev, > if (!ndev) > return -ENOMEM; > > - data = (struct ntb_epf_data *)id->driver_data; > - if (data) { > - peer_spad_reg_bar = data->peer_spad_reg_bar; > - ctrl_reg_bar = data->ctrl_reg_bar; > - db_reg_bar = data->db_reg_bar; > - mw_bar = data->mw_bar; > - } > + ndev->barno_map = (const enum pci_barno *)id->driver_data; > + if (!ndev->barno_map) > + return -EINVAL; > > - ndev->peer_spad_reg_bar = peer_spad_reg_bar; > - ndev->ctrl_reg_bar = ctrl_reg_bar; > - ndev->db_reg_bar = db_reg_bar; > - ndev->mw_bar = mw_bar; > ndev->dev = dev; > > ntb_epf_init_struct(ndev, pdev); > @@ -730,30 +727,36 @@ static void ntb_epf_pci_remove(struct pci_dev *pdev) > ntb_epf_deinit_pci(ndev); > } > > -static const struct ntb_epf_data j721e_data = { > - .ctrl_reg_bar = BAR_0, > - .peer_spad_reg_bar = BAR_1, > - .db_reg_bar = BAR_2, > - .mw_bar = BAR_2, > +static const enum pci_barno j721e_map[NTB_BAR_NUM] = { > + [BAR_CONFIG] = BAR_0, > + [BAR_PEER_SPAD] = BAR_1, > + [BAR_DB] = BAR_2, > + [BAR_MW1] = BAR_2, > + [BAR_MW2] = BAR_3, > + [BAR_MW3] = BAR_4, > + [BAR_MW4] = BAR_5 > }; > > -static const struct ntb_epf_data mx8_data = { > - .ctrl_reg_bar = BAR_0, > - .peer_spad_reg_bar = BAR_0, > - .db_reg_bar = BAR_2, > - .mw_bar = BAR_4, > +static const enum pci_barno mx8_map[NTB_BAR_NUM] = { > + [BAR_CONFIG] = BAR_0, > + [BAR_PEER_SPAD] = BAR_0, > + [BAR_DB] = BAR_2, > + [BAR_MW1] = BAR_4, > + [BAR_MW2] = BAR_5, > + [BAR_MW3] = NO_BAR, > + [BAR_MW4] = NO_BAR > }; > > static const struct pci_device_id ntb_epf_pci_tbl[] = { > { > PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E), > .class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00, > - .driver_data = (kernel_ulong_t)&j721e_data, > + .driver_data = (kernel_ulong_t)j721e_map, > }, > { > PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x0809), > .class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00, > - .driver_data = (kernel_ulong_t)&mx8_data, > + .driver_data = (kernel_ulong_t)mx8_map, > }, > { }, > }; > > -- > 2.47.2 >