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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4561976784dsm11426405e9.18.2025.07.13.09.09.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Jul 2025 09:09:20 -0700 (PDT) Date: Sun, 13 Jul 2025 18:09:17 +0200 From: Daniel Lezcano To: Anjelique Melendez Cc: amitk@kernel.org, thara.gopinath@gmail.com, rafael@kernel.org, rui.zhang@intel.com, lukasz.luba@arm.com, david.collins@oss.qualcomm.com, stefan.schmidt@linaro.org, quic_tsoni@quicinc.com, konrad.dybcio@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, dmitry.baryshkov@oss.qualcomm.com Subject: Re: [PATCH v6 0/5] thermal: qcom-spmi-temp-alarm: Add support for new TEMP_ALARM subtypes Message-ID: References: <20250710224555.3047790-1-anjelique.melendez@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250710224555.3047790-1-anjelique.melendez@oss.qualcomm.com> On Thu, Jul 10, 2025 at 03:45:50PM -0700, Anjelique Melendez wrote: > Add support in the qcom-spmi-temp-alarm driver for the new PMIC > TEMP_ALARM peripheral subtypes: GEN2 rev 2 and LITE. The GEN2 rev 2 > subtype provides greater flexibility in temperature threshold > specification by using an independent register value to configure > each of the three thresholds. The LITE subtype utilizes a simplified > set of control registers to configure two thresholds: warning and > shutdown. While at it refactor the qcom-spmi-temp-alarm driver to limit > code reuse and if/else statements when deciphering between TEMP_ALARM > peripheral subtypes. > > Also add support to avoid a potential issue on certain versions of > the TEMP_ALARM GEN2 subtype when automatic stage 2 partial shutdown > is disabled. > > This patch series is a continuation of older series from 7/2024 > (https://lore.kernel.org/all/20240729231259.2122976-1-quic_amelende@quicinc.com/) > but current series has been reworked to address the change in thermal framework to > update .set_trip_temp() callback function variables > (https://lore.kernel.org/all/8392906.T7Z3S40VBb@rjwysocki.net/) > > Changes since v5: > - Updated variable names to use stage2 instead of s2 in patch 1/5 > - Added overtemp_stage enum for more clarity when reading back specific > temperature threshold in patch 2/5 > - Updated temp alarm data subtype identification order in patch 4/5 > - link: https://lore.kernel.org/all/20250620001918.4090853-1-anjelique.melendez@oss.qualcomm.com/ > Changes since v4: > - Removed the unnecessary thresh member of the qpnp_tm_chip struct in patch 2/5 > - Updated order of logic to limit acquiring and releasing lock within > qpnp_tm_init() in patch 3/5 > - Fixed misuse of signed vs unsigned integers in patches 4/5 and 5/5 > - Added Dmitry's reviewed-by tag in patch 5/5 > - link: https://lore.kernel.org/all/20250528235026.4171109-1-anjelique.melendez@oss.qualcomm.com/ > Changes since v3: > - Updated order of logic and made dig revision a local variable in patch 1/5 > - Updated Locking Logic in patches 3/5, 4/5, 5/5 > - link: https://lore.kernel.org/all/20250320202408.3940777-1-anjelique.melendez@oss.qualcomm.com/ > Changes since v2: > - Updated function name to include "gen1" in patch 2/5 > - Added Dmitry's reviewed-by tag in patch 2/5 > - link: https://lore.kernel.org/all/20250225192429.2328092-1-anjelique.melendez@oss.qualcomm.com/ > Changes since v1: > - Remove unnecessary moving of code > - Added new v2 patch 3/5 add a preparation patch to v1 patch 2/5 > - Updated temp alarm data function names to be consistently named > - link: https://lore.kernel.org/all/20250213210403.3396392-1-anjelique.melendez@oss.qualcomm.com/ > > > Anjelique Melendez (4): > thermal: qcom-spmi-temp-alarm: Add temp alarm data struct based on HW > subtype > thermal: qcom-spmi-temp-alarm: Prepare to support additional Temp > Alarm subtypes > thermal: qcom-spmi-temp-alarm: add support for GEN2 rev 2 PMIC > peripherals > thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals > > David Collins (1): > thermal: qcom-spmi-temp-alarm: enable stage 2 shutdown when required > > drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 596 +++++++++++++++++--- > 1 file changed, 520 insertions(+), 76 deletions(-) > > -- Applied, thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog