Re: [PATCH v2 2/8] iio: imu: inv_icm45600: add new inv_icm45600 driver

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Tue, Jul 15, 2025 at 09:11:47AM +0000, Remi Buisson wrote:
> >From: Andy Shevchenko <andriy.shevchenko@intel.com> 
> >Sent: Friday, July 11, 2025 1:56 PM
> >On Fri, Jul 11, 2025 at 11:32:48AM +0000, Remi Buisson wrote:
> >> >From: Andy Shevchenko andriy.shevchenko@intel.com<mailto:andriy.shevchenko@intel.com>
> >> >Sent: Thursday, July 10, 2025 11:30 AM
> >> >On Thu, Jul 10, 2025 at 08:57:57AM +0000, Remi Buisson via B4 Relay wrote:

...

> >> >> +#define INV_ICM45600_SENSOR_CONF_INIT                        {-1, -1, -1, -1}
> >> >
> >> >Unused.
> >> This is used in later patch of the serie.
> >> I will move this definition to the patch using it.
> >
> >Yes, unused in this code. You should compile the series incrementally,
> >so each patch will get a compilation test. This is called compile-time
> >bisectability. Also run the system each time to confirm no regressions
> >(this is called run-time bisectability).

> Yes I did that for each patch, everything build successfully.
> In that case, nothing is broken due to this early definition of the macro.
> But I'll definitely move it to later patch for clarity. 

Yeah, the problem is that the (unused) definitions are not warned even when
`make W=1`. And I guess I understand why. We have tons of unused definitions
in the drivers that usually substitute (on whatever reasons) the actual
documentation. It's hard to catch for the definitions like this without reading
the code.

...

> >> It's probably safer to keep the delay even in case of failure to make sure
> >> the device is ready before next operation.
> >
> >I am not sure about it. Why? This has to be well justified as it's quite
> >unusual pattern.

> Ok I understand, the hardware needs that delay if the access was actually
> done on the bus (to not jeopardize next access).  If a regmap error means
> that no real access occured then the delay is avoidable.

Perhaps you need to have this delay embedded in the IO accessors? Also do
read _and_ write need this or only one of them?

-- 
With Best Regards,
Andy Shevchenko