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Wed, 06 Aug 2025 11:31:20 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 576BVJ5I010229 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 6 Aug 2025 11:31:19 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 6 Aug 2025 04:31:13 -0700 Date: Wed, 6 Aug 2025 17:01:10 +0530 From: Varadarajan Narayanan To: Konrad Dybcio CC: , , , , , , , , , , , , , , , , "Sricharan Ramabadhran" Subject: Re: [PATCH v5 4/4] arm64: dts: qcom: ipq5424: Enable cpufreq Message-ID: References: <20250804112041.845135-1-quic_varada@quicinc.com> <20250804112041.845135-5-quic_varada@quicinc.com> <4890c832-3b78-4294-aaba-b62735f7934e@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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> > + opp-shared; > > + nvmem-cells = <&cpu_speed_bin>; > > + > > + opp-816000000 { > > + opp-hz = /bits/ 64 <816000000>; > > + opp-microvolt = <1>; > > I just noticed this.. I don't think we have CPUs this efficient just yet > > Do we know some real values for these? Have fixed these and other comments and posted v6. Please take a look. Thanks Varada