From: Sean Christopherson <seanjc@google.com>
To: Sagi Shahar <sagis@google.com>
Cc: linux-kselftest@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>,
Shuah Khan <shuah@kernel.org>,
Ackerley Tng <ackerleytng@google.com>,
Ryan Afranji <afranji@google.com>,
Andrew Jones <ajones@ventanamicro.com>,
Isaku Yamahata <isaku.yamahata@intel.com>,
Erdem Aktas <erdemaktas@google.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Roger Wang <runanwang@google.com>,
Binbin Wu <binbin.wu@linux.intel.com>,
Oliver Upton <oliver.upton@linux.dev>,
"Pratik R. Sampat" <pratikrajesh.sampat@amd.com>,
Reinette Chatre <reinette.chatre@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Adrian Hunter <adrian.hunter@intel.com>
Subject: Re: [PATCH v8 05/30] KVM: selftests: Update kvm_init_vm_address_properties() for TDX
Date: Mon, 11 Aug 2025 11:34:43 -0700 [thread overview]
Message-ID: <aJo3ww82Ln-PxgGL@google.com> (raw)
In-Reply-To: <20250807201628.1185915-6-sagis@google.com>
On Thu, Aug 07, 2025, Sagi Shahar wrote:
> From: Isaku Yamahata <isaku.yamahata@intel.com>
>
> Let kvm_init_vm_address_properties() initialize vm->arch.{s_bit, tag_mask}
> similar to SEV.
>
> Set shared bit position based on guest maximum physical address width
> instead of maximum physical address width, because that is what KVM
> uses,
"because KVM does it" is not an acceptable explanation.
> refer to setup_tdparams_eptp_controls(), and because maximum physical
> address width can be different.
>
> In the case of SRF, guest maximum physical address width is 48 because SRF
> does not support 5-level EPT, even though the maximum physical address
> width is 52.
Referencing a specific Intel microarchitecture is not proper justification for
why something is supported/legal/correct. Using its three-letter acronym is
just icing on the cake.
> Co-developed-by: Adrian Hunter <adrian.hunter@intel.com>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> Signed-off-by: Sagi Shahar <sagis@google.com>
> ---
> tools/testing/selftests/kvm/lib/x86/processor.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testing/selftests/kvm/lib/x86/processor.c
> index d082d429e127..5718b5911b0a 100644
> --- a/tools/testing/selftests/kvm/lib/x86/processor.c
> +++ b/tools/testing/selftests/kvm/lib/x86/processor.c
> @@ -1166,10 +1166,19 @@ void kvm_get_cpu_address_width(unsigned int *pa_bits, unsigned int *va_bits)
>
> void kvm_init_vm_address_properties(struct kvm_vm *vm)
> {
> + uint32_t gpa_bits = kvm_cpu_property(X86_PROPERTY_GUEST_MAX_PHY_ADDR);
> +
> if (is_sev_vm(vm)) {
> vm->arch.sev_fd = open_sev_dev_path_or_exit();
> vm->arch.c_bit = BIT_ULL(this_cpu_property(X86_PROPERTY_SEV_C_BIT));
> vm->gpa_tag_mask = vm->arch.c_bit;
> + } else if (vm->type == KVM_X86_TDX_VM) {
Please add an is_tdx_vm() helper.
> + TEST_ASSERT(gpa_bits == 48 || gpa_bits == 52,
> + "TDX: bad X86_PROPERTY_GUEST_MAX_PHY_ADDR value: %u", gpa_bits);
> + vm->arch.sev_fd = -1;
> + vm->arch.s_bit = 1ULL << (gpa_bits - 1);
> + vm->arch.c_bit = 0;
The VM is zero-initialized, no need to set c_bit.
> + vm->gpa_tag_mask = vm->arch.s_bit;
> } else {
> vm->arch.sev_fd = -1;
I think it makes sense to set sev_fd to -1 by default instead of duplicating the
non-SEV logic into all non-SEV paths. SEV VMs will write it twice, but that's a
non-issue. E.g.
vm->arch.sev_fd = -1;
if (is_sev_vm(vm)) {
vm->arch.sev_fd = open_sev_dev_path_or_exit();
vm->arch.c_bit = BIT_ULL(this_cpu_property(X86_PROPERTY_SEV_C_BIT));
vm->gpa_tag_mask = vm->arch.c_bit;
} else if (is_tdx_vm(vm)) {
TEST_ASSERT(gpa_bits == 48 || gpa_bits == 52,
"TDX: bad X86_PROPERTY_GUEST_MAX_PHY_ADDR value: %u", gpa_bits);
vm->arch.s_bit = 1ULL << (gpa_bits - 1);
vm->gpa_tag_mask = vm->arch.s_bit;
}
next prev parent reply other threads:[~2025-08-11 18:34 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-07 20:15 [PATCH v8 00/30] TDX KVM selftests Sagi Shahar
2025-08-07 20:15 ` [PATCH v8 01/30] KVM: selftests: Add function to allow one-to-one GVA to GPA mappings Sagi Shahar
2025-08-11 17:49 ` Sean Christopherson
2025-08-15 4:16 ` Sagi Shahar
2025-08-07 20:15 ` [PATCH v8 02/30] KVM: selftests: Expose function that sets up sregs based on VM's mode Sagi Shahar
2025-08-11 18:11 ` Sean Christopherson
2025-08-15 4:24 ` Sagi Shahar
2025-08-07 20:15 ` [PATCH v8 03/30] KVM: selftests: Store initial stack address in struct kvm_vcpu Sagi Shahar
2025-08-11 18:12 ` Sean Christopherson
2025-08-07 20:16 ` [PATCH v8 04/30] KVM: selftests: Add vCPU descriptor table initialization utility Sagi Shahar
2025-08-11 18:25 ` Sean Christopherson
2025-08-15 4:29 ` Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 05/30] KVM: selftests: Update kvm_init_vm_address_properties() for TDX Sagi Shahar
2025-08-11 18:34 ` Sean Christopherson [this message]
2025-08-15 4:31 ` Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 06/30] KVM: selftests: Add helper functions to create TDX VMs Sagi Shahar
2025-08-11 20:13 ` Sean Christopherson
2025-08-12 21:05 ` Ira Weiny
2025-08-13 4:22 ` Binbin Wu
2025-08-15 5:20 ` Sagi Shahar
2025-08-16 0:22 ` Sean Christopherson
2025-08-16 0:32 ` Reinette Chatre
2025-08-16 0:28 ` Reinette Chatre
2025-08-13 7:41 ` Binbin Wu
2025-08-15 2:20 ` Chao Gao
2025-08-21 4:08 ` Sagi Shahar
2025-08-14 0:48 ` Edgecombe, Rick P
2025-08-21 4:15 ` Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 07/30] KVM: selftests: TDX: Use KVM_TDX_CAPABILITIES to validate TDs' attribute configuration Sagi Shahar
2025-08-13 13:34 ` Chenyi Qiang
2025-08-20 21:18 ` Sagi Shahar
2025-08-20 21:49 ` Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 08/30] KVM: selftests: TDX: Update load_td_memory_region() for VM memory backed by guest memfd Sagi Shahar
2025-08-11 14:19 ` Ira Weiny
2025-08-11 20:31 ` Sean Christopherson
2025-08-13 9:23 ` Binbin Wu
2025-08-13 14:42 ` Reinette Chatre
2025-08-14 2:49 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 09/30] KVM: selftests: TDX: Add TDX lifecycle test Sagi Shahar
2025-08-13 10:36 ` Binbin Wu
2025-08-21 4:19 ` Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 10/30] KVM: selftests: TDX: Add report_fatal_error test Sagi Shahar
2025-08-13 10:58 ` Binbin Wu
2025-08-14 7:05 ` Binbin Wu
2025-08-25 21:49 ` Sagi Shahar
2025-08-25 21:28 ` Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 11/30] KVM: selftests: TDX: Adding test case for TDX port IO Sagi Shahar
2025-08-14 3:24 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 12/30] KVM: selftests: TDX: Add basic TDX CPUID test Sagi Shahar
2025-08-14 3:20 ` Chenyi Qiang
2025-08-14 6:11 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 13/30] KVM: selftests: TDX: Add basic TDG.VP.VMCALL<GetTdVmCallInfo> test Sagi Shahar
2025-08-14 6:34 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 14/30] KVM: selftests: TDX: Add TDX IO writes test Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 15/30] KVM: selftests: TDX: Add TDX IO reads test Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 16/30] KVM: selftests: TDX: Add TDX MSR read/write tests Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 17/30] KVM: selftests: TDX: Add TDX HLT exit test Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 18/30] KVM: selftests: TDX: Add TDX MMIO reads test Sagi Shahar
2025-08-14 9:58 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 19/30] KVM: selftests: TDX: Add TDX MMIO writes test Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 20/30] KVM: selftests: TDX: Add TDX CPUID TDVMCALL test Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 21/30] KVM: selftests: TDX: Verify the behavior when host consumes a TD private memory Sagi Shahar
2025-08-11 20:35 ` Sean Christopherson
2025-08-14 11:17 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 22/30] KVM: selftests: TDX: Add TDG.VP.INFO test Sagi Shahar
2025-08-14 9:04 ` Chenyi Qiang
2025-08-14 11:48 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 23/30] KVM: selftests: Add functions to allow mapping as shared Sagi Shahar
2025-08-11 18:49 ` Ira Weiny
2025-08-15 2:37 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 24/30] KVM: selftests: TDX: Add shared memory test Sagi Shahar
2025-08-11 21:06 ` Sean Christopherson
2025-08-07 20:16 ` [PATCH v8 25/30] KVM: selftests: KVM: selftests: Expose new vm_vaddr_alloc_private() Sagi Shahar
2025-08-11 21:07 ` Sean Christopherson
2025-08-15 3:15 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 26/30] KVM: selftests: TDX: Add support for TDG.MEM.PAGE.ACCEPT Sagi Shahar
2025-08-15 5:38 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 27/30] KVM: selftests: TDX: Add support for TDG.VP.VEINFO.GET Sagi Shahar
2025-08-07 20:16 ` [PATCH v8 28/30] KVM: selftests: TDX: Add TDX UPM selftest Sagi Shahar
2025-08-13 16:05 ` Ira Weiny
2025-08-13 17:30 ` Reinette Chatre
2025-08-15 7:03 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 29/30] KVM: selftests: TDX: Add TDX UPM selftests for implicit conversion Sagi Shahar
2025-08-15 7:18 ` Binbin Wu
2025-08-07 20:16 ` [PATCH v8 30/30] KVM: selftests: TDX: Test LOG_DIRTY_PAGES flag to a non-GUEST_MEMFD memslot Sagi Shahar
2025-08-13 16:10 ` Ira Weiny
2025-08-11 17:38 ` [PATCH v8 00/30] TDX KVM selftests Sean Christopherson
2025-08-11 18:11 ` Edgecombe, Rick P
2025-08-11 20:00 ` Sagi Shahar
2025-08-11 20:53 ` Sean Christopherson
2025-08-15 4:14 ` Sagi Shahar
2025-08-15 22:52 ` Sean Christopherson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aJo3ww82Ln-PxgGL@google.com \
--to=seanjc@google.com \
--cc=ackerleytng@google.com \
--cc=adrian.hunter@intel.com \
--cc=afranji@google.com \
--cc=ajones@ventanamicro.com \
--cc=binbin.wu@linux.intel.com \
--cc=erdemaktas@google.com \
--cc=ira.weiny@intel.com \
--cc=isaku.yamahata@intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=oliver.upton@linux.dev \
--cc=pbonzini@redhat.com \
--cc=pratikrajesh.sampat@amd.com \
--cc=reinette.chatre@intel.com \
--cc=rick.p.edgecombe@intel.com \
--cc=runanwang@google.com \
--cc=sagis@google.com \
--cc=shuah@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®