From: Catalin Marinas <catalin.marinas@arm.com>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Jinjie Ruan <ruanjinjie@huawei.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH] irqchip/gic-v5: Fix kmemleak L2 IST table entries false positives
Date: Tue, 26 Aug 2025 20:34:27 +0100 [thread overview]
Message-ID: <aK4MQ3dur0cyluGl@arm.com> (raw)
In-Reply-To: <20250811135001.1333684-1-lpieralisi@kernel.org>
On Mon, Aug 11, 2025 at 03:50:01PM +0200, Lorenzo Pieralisi wrote:
> diff --git a/drivers/irqchip/irq-gic-v5-irs.c b/drivers/irqchip/irq-gic-v5-irs.c
> index ad1435a858a4..e8a576f66366 100644
> --- a/drivers/irqchip/irq-gic-v5-irs.c
> +++ b/drivers/irqchip/irq-gic-v5-irs.c
> @@ -5,6 +5,7 @@
>
> #define pr_fmt(fmt) "GICv5 IRS: " fmt
>
> +#include <linux/kmemleak.h>
> #include <linux/log2.h>
> #include <linux/of.h>
> #include <linux/of_address.h>
> @@ -117,6 +118,7 @@ static int __init gicv5_irs_init_ist_linear(struct gicv5_irs_chip_data *irs_data
> kfree(ist);
> return ret;
> }
> + kmemleak_ignore(ist);
Nit: if you ever respin, please add a short comment on why this is a
false positive (easier to see it in the code than the git logs).
>
> return 0;
> }
> @@ -232,6 +234,7 @@ int gicv5_irs_iste_alloc(const u32 lpi)
> kfree(l2ist);
> return ret;
> }
> + kmemleak_ignore(l2ist);
Same here.
--
Catalin
next prev parent reply other threads:[~2025-08-26 19:34 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-11 13:50 Lorenzo Pieralisi
2025-08-11 14:54 ` Marc Zyngier
2025-08-21 6:53 ` Zenghui Yu
2025-08-21 7:11 ` Jinjie Ruan
2025-08-24 10:22 ` [tip: irq/urgent] " tip-bot2 for Lorenzo Pieralisi
2025-08-26 19:34 ` Catalin Marinas [this message]
2025-09-08 13:26 ` [PATCH] " Lorenzo Pieralisi
2025-09-09 16:38 ` Catalin Marinas
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