From: Lukas Wunner <lukas@wunner.de>
To: Hans Zhang <18255117159@163.com>
Cc: mahesh@linux.ibm.com, bhelgaas@google.com, oohall@gmail.com,
mani@kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] PCI/AER: Use pci_clear_and_set_config_dword() to simplify mask updates
Date: Sat, 16 Aug 2025 22:25:05 +0200 [thread overview]
Message-ID: <aKDpIeQgt7I9Ts8F@wunner.de> (raw)
In-Reply-To: <20250816161743.340684-1-18255117159@163.com>
On Sun, Aug 17, 2025 at 12:17:43AM +0800, Hans Zhang wrote:
> Replace manual read-modify-write sequences in multiple functions with
> pci_clear_and_set_config_dword() helper to reduce code duplication.
None of the occurrences you're replacing is clearing *and* setting
bits at the same time. They all either clear or set bits, but not both.
For the PCIe Capability, there are pcie_capability_clear_dword()
and pcie_capability_set_dword() helpers.
It would arguably be clearer and less confusing to introduce similar
pci_clear_config_dword() and pci_set_config_dword() helpers and use
those, instead of using pci_clear_and_set_config_dword() and setting
one argument to 0.
Thanks,
Lukas
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index e286c197d716..3d37e2b7e412 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -176,14 +176,13 @@ static int enable_ecrc_checking(struct pci_dev *dev)
> static int disable_ecrc_checking(struct pci_dev *dev)
> {
> int aer = dev->aer_cap;
> - u32 reg32;
>
> if (!aer)
> return -ENODEV;
>
> - pci_read_config_dword(dev, aer + PCI_ERR_CAP, ®32);
> - reg32 &= ~(PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
> - pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32);
> + pci_clear_and_set_config_dword(dev, aer + PCI_ERR_CAP,
> + PCI_ERR_CAP_ECRC_GENE |
> + PCI_ERR_CAP_ECRC_CHKE, 0);
>
> return 0;
> }
> @@ -1102,15 +1101,12 @@ static bool find_source_device(struct pci_dev *parent,
> static void pci_aer_unmask_internal_errors(struct pci_dev *dev)
> {
> int aer = dev->aer_cap;
> - u32 mask;
>
> - pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &mask);
> - mask &= ~PCI_ERR_UNC_INTN;
> - pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, mask);
> + pci_clear_and_set_config_dword(dev, aer + PCI_ERR_UNCOR_MASK,
> + PCI_ERR_UNC_INTN, 0);
>
> - pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, &mask);
> - mask &= ~PCI_ERR_COR_INTERNAL;
> - pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, mask);
> + pci_clear_and_set_config_dword(dev, aer + PCI_ERR_COR_MASK,
> + PCI_ERR_COR_INTERNAL, 0);
> }
>
> static bool is_cxl_mem_dev(struct pci_dev *dev)
> @@ -1556,23 +1552,19 @@ static irqreturn_t aer_irq(int irq, void *context)
> static void aer_enable_irq(struct pci_dev *pdev)
> {
> int aer = pdev->aer_cap;
> - u32 reg32;
>
> /* Enable Root Port's interrupt in response to error messages */
> - pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, ®32);
> - reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
> - pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
> + pci_clear_and_set_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND,
> + 0, ROOT_PORT_INTR_ON_MESG_MASK);
> }
>
> static void aer_disable_irq(struct pci_dev *pdev)
> {
> int aer = pdev->aer_cap;
> - u32 reg32;
>
> /* Disable Root Port's interrupt in response to error messages */
> - pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, ®32);
> - reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
> - pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
> + pci_clear_and_set_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND,
> + ROOT_PORT_INTR_ON_MESG_MASK, 0);
> }
>
> /**
next prev parent reply other threads:[~2025-08-16 20:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-16 16:17 Hans Zhang
2025-08-16 20:25 ` Lukas Wunner [this message]
2025-08-17 15:07 ` Hans Zhang
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