From: Chao Gao <chao.gao@intel.com>
To: John Allen <john.allen@amd.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<x86@kernel.org>, <seanjc@google.com>, <pbonzini@redhat.com>,
<dave.hansen@intel.com>, <rick.p.edgecombe@intel.com>,
<mlevitsk@redhat.com>, <weijiang.yang@intel.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
<mingo@redhat.com>, <tglx@linutronix.de>,
<thomas.lendacky@amd.com>
Subject: Re: [PATCH v3 4/5] KVM: SVM: Add MSR_IA32_XSS to the GHCB for hypervisor kernel
Date: Mon, 25 Aug 2025 09:46:13 +0800 [thread overview]
Message-ID: <aKvAZeY+Q8r02u0Q@intel.com> (raw)
In-Reply-To: <20250806204510.59083-5-john.allen@amd.com>
On Wed, Aug 06, 2025 at 08:45:09PM +0000, John Allen wrote:
>When a guest issues a cpuid instruction for Fn0000000D_x0B
>(CetUserOffset), KVM will intercept and need to access the guest
>MSR_IA32_XSS value. For SEV-ES, this is encrypted and needs to be
>included in the GHCB to be visible to the hypervisor.
>
>Signed-off-by: John Allen <john.allen@amd.com>
>---
>v2:
> - Omit passing through XSS as this has already been properly
> implemented in a26b7cd22546 ("KVM: SEV: Do not intercept
> accesses to MSR_IA32_XSS for SEV-ES guests")
>v3:
> - Move guest kernel GHCB_ACCESSORS definition to new series.
>---
> arch/x86/kvm/svm/sev.c | 9 +++++++--
> arch/x86/kvm/svm/svm.h | 1 +
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
>diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
>index 3f20f6eb1ef6..2905a62e7bf2 100644
>--- a/arch/x86/kvm/svm/sev.c
>+++ b/arch/x86/kvm/svm/sev.c
>@@ -3239,8 +3239,13 @@ static void sev_es_sync_from_ghcb(struct vcpu_svm *svm)
>
> svm->vmcb->save.cpl = kvm_ghcb_get_cpl_if_valid(svm, ghcb);
>
>- if (kvm_ghcb_xcr0_is_valid(svm)) {
>- vcpu->arch.xcr0 = ghcb_get_xcr0(ghcb);
>+ if (kvm_ghcb_xcr0_is_valid(svm) || kvm_ghcb_xss_is_valid(svm)) {
>+ if (kvm_ghcb_xcr0_is_valid(svm))
>+ vcpu->arch.xcr0 = ghcb_get_xcr0(ghcb);
>+
>+ if (kvm_ghcb_xss_is_valid(svm))
>+ vcpu->arch.ia32_xss = ghcb_get_xss(ghcb);
>+
> vcpu->arch.cpuid_dynamic_bits_dirty = true;
It seems a bit odd to me. How about:
if (kvm_ghcb_xcr0_is_valid(svm)) {
vcpu->arch.xcr0 = ghcb_get_xcr0(ghcb);
vcpu->arch.cpuid_dynamic_bits_dirty = true;
}
if (kvm_ghcb_xss_is_valid(svm)) {
vcpu->arch.xss = ghcb_get_xss(ghcb);
vcpu->arch.cpuid_dynamic_bits_dirty = true;
}
This looks better because it has less indentation and reduces the number
of "if" statements by one.
> }
>
>diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
>index dabd69d6fd15..b189647d8389 100644
>--- a/arch/x86/kvm/svm/svm.h
>+++ b/arch/x86/kvm/svm/svm.h
>@@ -925,5 +925,6 @@ DEFINE_KVM_GHCB_ACCESSORS(sw_exit_info_1)
> DEFINE_KVM_GHCB_ACCESSORS(sw_exit_info_2)
> DEFINE_KVM_GHCB_ACCESSORS(sw_scratch)
> DEFINE_KVM_GHCB_ACCESSORS(xcr0)
>+DEFINE_KVM_GHCB_ACCESSORS(xss)
>
> #endif
>--
>2.34.1
>
next prev parent reply other threads:[~2025-08-25 1:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 20:45 [PATCH v3 0/5] Enable Shadow Stack Virtualization for SVM John Allen
2025-08-06 20:45 ` [PATCH v3 1/5] KVM: x86: SVM: Emulate reads and writes to shadow stack MSRs John Allen
2025-08-25 1:27 ` Chao Gao
2025-08-06 20:45 ` [PATCH v3 2/5] KVM: x86: SVM: Update dump_vmcb with shadow stack save area additions John Allen
2025-08-22 20:57 ` Tom Lendacky
2025-08-06 20:45 ` [PATCH v3 3/5] KVM: x86: SVM: Pass through shadow stack MSRs John Allen
2025-08-25 1:21 ` Chao Gao
2025-08-06 20:45 ` [PATCH v3 4/5] KVM: SVM: Add MSR_IA32_XSS to the GHCB for hypervisor kernel John Allen
2025-08-25 1:46 ` Chao Gao [this message]
2025-08-06 20:45 ` [PATCH v3 5/5] KVM: SVM: Enable shadow stack virtualization for SVM John Allen
2025-08-25 1:33 ` Chao Gao
2025-09-03 21:01 ` John Allen
2025-09-05 20:50 ` Chao Gao
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