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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?TR1iKtiSbAIS+IWaHxoXheosUf4ibLkG+KpaCJAMxcoXUiH1ykFypMDRl7S8?= =?us-ascii?Q?hovB44ppN/DxugBmGqIYgox72/PmReS6Cgv1hHt7pCwPyOSoCT6szcerHD43?= =?us-ascii?Q?FnUmkHRUfv7L0pnsI127daUDbJ4rhA8x2LP273d3HJ3qGGonmyw2B71lh6OJ?= =?us-ascii?Q?tmrr9kAI8YjFctvk5fL2uoEadzdfUwPXiquNQ91MUcU5iMmDQJmev3wNzjHf?= =?us-ascii?Q?eYSrNU+PMONB3d9ReyoNZhWyMU4sT6vtTYtUbP+kZM9G79NK0kk2Hro8IIm1?= =?us-ascii?Q?FPnxyOk0ekQaN4s+ny1WtU2f7wpTTlByGvRbCrvDknzlEf0FbZeOgy0kNk5B?= =?us-ascii?Q?COailTCKlhXktCZn5/zpqoNllTLqcj4/GBnxzK2bAs7aaSkn4lI1ETLCBnCw?= =?us-ascii?Q?dlZ9qGlmHq4SKYgRXWDMZ5DMw1Mohb3uV+X03NHwPHj2m7Pn62x4wGbAHJ+w?= =?us-ascii?Q?uBpVv3+sCSmyWf3I8Z+zhpPTxfXkb6KiJVYZfc7mxH+y/rRB9hL6ihdo+GW0?= =?us-ascii?Q?6B8dIBVJU3zpVDzLzUNLpfmjmjPGqq2w7dslFD6GLhNfdCsIHHp7KzZ//vyo?= =?us-ascii?Q?V2P3btWgvWMORL1AXMEAEe8EQKLtE9Ite/SME9oGVquGFZHEEOEOA/Qy9tNS?= =?us-ascii?Q?I53MyTVE8kUq0efZfgYe/PLNiCIkMf4BlaCkFaPKia1VV4DKmbp5Dt7t8u6C?= =?us-ascii?Q?Ef0ZiJ+JzmiG4YkwPMUlRzRDgggWZbHFjriqxba1rKjziB18nldwN8akKei7?= =?us-ascii?Q?MFdUGu6NMDPH9R69neD9oXdJxlYLxW4YURAWEjiv8TfwmQhwoqQYGrFS4x3F?= =?us-ascii?Q?dDLB6yYP7/h9mSTNr8UB15iNXcNnJxGhzxUrtnFaThGwIgrH5GayBI7lcjVo?= =?us-ascii?Q?AQL6R3cNvdgbljJYYj8NhFWGF5+Jf718vDDqbXUR+uJxBCnSGcWFj/uWKxAw?= =?us-ascii?Q?XE4SqIJJJPBivHrm+CXPXKN8xgSmB6F2p7j1Z3Xk2r8rphq/S4pO+/4qPAdq?= =?us-ascii?Q?oz6sHkfcFWEW3KtEkkDaBtbIO7s3Y8CRPH8KEEveBPqgWHhGubo/UCk12Wo6?= =?us-ascii?Q?jdHDP+8E/TW80hW5cMu5Mlxoz4f88XrrNCSxILYeccUQmzfPdKzkFz58oLMP?= =?us-ascii?Q?4n3NFMTmgWlbK+QhzAetrUEC2/Df/PFEWwWp7j5lmrUlCWaPtIPmq8ymE0+o?= =?us-ascii?Q?wfhIdD4kaFpWAkvfvVPR29HNgmlGOZNuLvjDiTbJ4QdHPTCvaHuVRihLhpsC?= =?us-ascii?Q?beci1lGdGLMy+W2tLAqVoWQYtPKoZatXaYJ7OhIAs2YSFtWMvw6cTo6KMvSr?= =?us-ascii?Q?9KVcr/R6JQ8mj9x7sGYhpEDkJRKGwyFIVwMvqaKYwZIDmi1OB5caTr/dgJWW?= =?us-ascii?Q?az8C/0dIjhMW/mz43h/lkWAGWLjjCN+IgIaut1cGRDvblYxXvz8GizaE4zWX?= =?us-ascii?Q?64JpRq3t1ystUBB+fkkxpcPQRu54T6Bi6Jz1Dgxzj20b9EjbRGUFb48z7XtJ?= =?us-ascii?Q?Cy5nuVpOsIDRuVrPgHjXpgYnXfPz7wvTuma2qK7HhdE0PIBMoRP35sbUxKU7?= =?us-ascii?Q?MlHN6Vk4fuMtqNNYof5r0VPnD1hVbcZaRdMTbNUa?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 84a4fc9e-0602-4573-0347-08ddf607821b X-MS-Exchange-CrossTenant-AuthSource: PAXSPRMB0053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Sep 2025 16:30:26.5415 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: u8BIbIWG1vXL07x3/zdrC637LfnZ3lC7mg+fMq1Gp9q8VLgPaVdKg47vPXaNUY+VSAtVJSG9+9xl+btuqg77BQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR04MB11144 On Wed, Sep 17, 2025 at 03:27:10PM +0800, Haibo Chen wrote: > Add OCT-DTR mode support in default, since flexspi do not supports > swapping bytes on a 16 bit boundary in OCT-DTR mode, so mark swap16 > as false. > > lx2160a do not support DQS, so add a quirk to disable DTR mode for this does? > platform. > > Signed-off-by: Haibo Chen > --- Reviewed-by: Frank Li > drivers/spi/spi-nxp-fspi.c | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c > index d25679fafad7a94a7ea2a79d7e3da53f4939c9fa..f9371f98a65bdc7e5eaa612c0770a6228bdda364 100644 > --- a/drivers/spi/spi-nxp-fspi.c > +++ b/drivers/spi/spi-nxp-fspi.c > @@ -330,6 +330,8 @@ > > /* Access flash memory using IP bus only */ > #define FSPI_QUIRK_USE_IP_ONLY BIT(0) > +/* Disable DTR */ > +#define FSPI_QUIRK_DISABLE_DTR BIT(1) > > struct nxp_fspi_devtype_data { > unsigned int rxfifo; > @@ -344,7 +346,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = { > .rxfifo = SZ_512, /* (64 * 64 bits) */ > .txfifo = SZ_1K, /* (128 * 64 bits) */ > .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ > - .quirks = 0, > + .quirks = FSPI_QUIRK_DISABLE_DTR, > .lut_num = 32, > .little_endian = true, /* little-endian */ > }; > @@ -1231,6 +1233,13 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = { > }; > > static const struct spi_controller_mem_caps nxp_fspi_mem_caps = { > + .dtr = true, > + .swap16 = false, > + .per_op_freq = true, > +}; > + > +static const struct spi_controller_mem_caps nxp_fspi_mem_caps_disable_dtr = { > + .dtr = false, > .per_op_freq = true, > }; > > @@ -1346,7 +1355,12 @@ static int nxp_fspi_probe(struct platform_device *pdev) > ctlr->bus_num = -1; > ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT; > ctlr->mem_ops = &nxp_fspi_mem_ops; > - ctlr->mem_caps = &nxp_fspi_mem_caps; > + > + if (f->devtype_data->quirks & FSPI_QUIRK_DISABLE_DTR) > + ctlr->mem_caps = &nxp_fspi_mem_caps_disable_dtr; > + else > + ctlr->mem_caps = &nxp_fspi_mem_caps; > + > ctlr->dev.of_node = np; > > ret = devm_add_action_or_reset(dev, nxp_fspi_cleanup, f); > > -- > 2.34.1 >