From: Frank Li <Frank.li@nxp.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: jingoohan1@gmail.com, l.stach@pengutronix.de,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
robh@kernel.org, bhelgaas@google.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 2/3] PCI: imx6: Rename imx8mm_pcie_enable_ref_clk() as imx8mm_pcie_clkreq_override()
Date: Mon, 22 Sep 2025 10:50:46 -0400 [thread overview]
Message-ID: <aNFiRny143V0YaAl@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20250922082433.1090066-3-hongxing.zhu@nxp.com>
On Mon, Sep 22, 2025 at 04:24:32PM +0800, Richard Zhu wrote:
> To align the function name when add the CLKREQ# override clear function
> later. Rename imx8mm_pcie_enable_ref_clk() as
> imx8mm_pcie_clkreq_override(). No function changes.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 80e48746bbaf..41f971693697 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -685,7 +685,7 @@ static int imx6q_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
> return 0;
> }
>
> -static int imx8mm_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
> +static int imx8mm_pcie_clkreq_override(struct imx_pcie *imx_pcie, bool enable)
> {
> int offset = imx_pcie_grp_offset(imx_pcie);
>
> @@ -1872,7 +1872,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_off[1] = IOMUXC_GPR12,
> .mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
> .init_phy = imx8mq_pcie_init_phy,
> - .enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> + .enable_ref_clk = imx8mm_pcie_clkreq_override,
I remember bjorn like callback impliment function name should include
callback name, here is "enable_ref_clk" to grep easily later.
Frank
> },
> [IMX8MM] = {
> .variant = IMX8MM,
> @@ -1882,7 +1882,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .gpr = "fsl,imx8mm-iomuxc-gpr",
> .mode_off[0] = IOMUXC_GPR12,
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> - .enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> + .enable_ref_clk = imx8mm_pcie_clkreq_override,
> },
> [IMX8MP] = {
> .variant = IMX8MP,
> @@ -1892,7 +1892,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .gpr = "fsl,imx8mp-iomuxc-gpr",
> .mode_off[0] = IOMUXC_GPR12,
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> - .enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> + .enable_ref_clk = imx8mm_pcie_clkreq_override,
> },
> [IMX8Q] = {
> .variant = IMX8Q,
> @@ -1926,7 +1926,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
> .epc_features = &imx8q_pcie_epc_features,
> .init_phy = imx8mq_pcie_init_phy,
> - .enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> + .enable_ref_clk = imx8mm_pcie_clkreq_override,
> },
> [IMX8MM_EP] = {
> .variant = IMX8MM_EP,
> @@ -1937,7 +1937,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_off[0] = IOMUXC_GPR12,
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .epc_features = &imx8m_pcie_epc_features,
> - .enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> + .enable_ref_clk = imx8mm_pcie_clkreq_override,
> },
> [IMX8MP_EP] = {
> .variant = IMX8MP_EP,
> @@ -1948,7 +1948,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_off[0] = IOMUXC_GPR12,
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .epc_features = &imx8m_pcie_epc_features,
> - .enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> + .enable_ref_clk = imx8mm_pcie_clkreq_override,
> },
> [IMX8Q_EP] = {
> .variant = IMX8Q_EP,
> --
> 2.37.1
>
next prev parent reply other threads:[~2025-09-22 14:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-22 8:24 [PATCH v4 0/3] PCI: imx6: Add a method to handle CLKREQ# override Richard Zhu
2025-09-22 8:24 ` [PATCH v4 1/3] PCI: dwc: Invoke post_init in dw_pcie_resume_noirq() Richard Zhu
2025-09-22 8:24 ` [PATCH v4 2/3] PCI: imx6: Rename imx8mm_pcie_enable_ref_clk() as imx8mm_pcie_clkreq_override() Richard Zhu
2025-09-22 14:50 ` Frank Li [this message]
2025-09-23 3:09 ` Hongxing Zhu
2025-09-22 8:24 ` [PATCH v4 3/3] PCI: imx6: Add a method to handle CLKREQ# override active low Richard Zhu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aNFiRny143V0YaAl@lizhi-Precision-Tower-5810 \
--to=frank.li@nxp.com \
--cc=bhelgaas@google.com \
--cc=festevam@gmail.com \
--cc=hongxing.zhu@nxp.com \
--cc=imx@lists.linux.dev \
--cc=jingoohan1@gmail.com \
--cc=kernel@pengutronix.de \
--cc=kwilczynski@kernel.org \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®