From: Alison Schofield <alison.schofield@intel.com>
To: Neeraj Kumar <s.neeraj@samsung.com>
Cc: <linux-cxl@vger.kernel.org>, <nvdimm@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, <gost.dev@samsung.com>,
<a.manzanares@samsung.com>, <vishak.g@samsung.com>,
<neeraj.kernel@gmail.com>, <cpgs@samsung.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>
Subject: Re: [PATCH V3 08/20] nvdimm/label: Include region label in slot validation
Date: Wed, 24 Sep 2025 14:30:59 -0700 [thread overview]
Message-ID: <aNRjE9gckXeC60-Q@aschofie-mobl2.lan> (raw)
In-Reply-To: <20250917134116.1623730-9-s.neeraj@samsung.com>
On Wed, Sep 17, 2025 at 07:11:04PM +0530, Neeraj Kumar wrote:
> Slot validation routine validates label slot by calculating label
> checksum. It was only validating namespace label. This changeset also
> validates region label if present.
Neeraj,
Was it previously wrong 'only validating namespace label'
- or -
Is validating region label something new available with cxl
namespaces that we now must add?
I'm looking for that pattern in these commit messages, ie
this is how it use to be, this is why it doesn't work now,
so here is the change.
-- Alison
>
> Signed-off-by: Neeraj Kumar <s.neeraj@samsung.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> drivers/nvdimm/label.c | 72 ++++++++++++++++++++++++++++++++----------
> drivers/nvdimm/nd.h | 5 +++
> 2 files changed, 60 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c
> index d33db96ba8ba..5e476154cf81 100644
> --- a/drivers/nvdimm/label.c
> +++ b/drivers/nvdimm/label.c
> @@ -359,7 +359,7 @@ static bool nsl_validate_checksum(struct nvdimm_drvdata *ndd,
> {
> u64 sum, sum_save;
>
> - if (!ndd->cxl && !efi_namespace_label_has(ndd, checksum))
> + if (!efi_namespace_label_has(ndd, checksum))
> return true;
>
> sum_save = nsl_get_checksum(ndd, nd_label);
> @@ -374,13 +374,25 @@ static void nsl_calculate_checksum(struct nvdimm_drvdata *ndd,
> {
> u64 sum;
>
> - if (!ndd->cxl && !efi_namespace_label_has(ndd, checksum))
> + if (!efi_namespace_label_has(ndd, checksum))
> return;
> nsl_set_checksum(ndd, nd_label, 0);
> sum = nd_fletcher64(nd_label, sizeof_namespace_label(ndd), 1);
> nsl_set_checksum(ndd, nd_label, sum);
> }
>
> +static bool region_label_validate_checksum(struct nvdimm_drvdata *ndd,
> + struct cxl_region_label *region_label)
> +{
> + u64 sum, sum_save;
> +
> + sum_save = region_label_get_checksum(region_label);
> + region_label_set_checksum(region_label, 0);
> + sum = nd_fletcher64(region_label, sizeof_namespace_label(ndd), 1);
> + region_label_set_checksum(region_label, sum_save);
> + return sum == sum_save;
> +}
> +
> static void region_label_calculate_checksum(struct nvdimm_drvdata *ndd,
> struct cxl_region_label *region_label)
> {
> @@ -392,16 +404,30 @@ static void region_label_calculate_checksum(struct nvdimm_drvdata *ndd,
> }
>
> static bool slot_valid(struct nvdimm_drvdata *ndd,
> - struct nd_namespace_label *nd_label, u32 slot)
> + union nd_lsa_label *lsa_label, u32 slot)
> {
> + struct cxl_region_label *region_label = &lsa_label->region_label;
> + struct nd_namespace_label *nd_label = &lsa_label->ns_label;
> + char *label_name;
> bool valid;
>
> /* check that we are written where we expect to be written */
> - if (slot != nsl_get_slot(ndd, nd_label))
> - return false;
> - valid = nsl_validate_checksum(ndd, nd_label);
> + if (is_region_label(ndd, lsa_label)) {
> + label_name = "rg";
> + if (slot != region_label_get_slot(region_label))
> + return false;
> + valid = region_label_validate_checksum(ndd, region_label);
> + } else {
> + label_name = "ns";
> + if (slot != nsl_get_slot(ndd, nd_label))
> + return false;
> + valid = nsl_validate_checksum(ndd, nd_label);
> + }
> +
> if (!valid)
> - dev_dbg(ndd->dev, "fail checksum. slot: %d\n", slot);
> + dev_dbg(ndd->dev, "%s label checksum fail. slot: %d\n",
> + label_name, slot);
> +
> return valid;
> }
>
> @@ -424,7 +450,7 @@ int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd)
>
> nd_label = to_label(ndd, slot);
>
> - if (!slot_valid(ndd, nd_label, slot))
> + if (!slot_valid(ndd, (union nd_lsa_label *) nd_label, slot))
> continue;
>
> nsl_get_uuid(ndd, nd_label, &label_uuid);
> @@ -575,18 +601,30 @@ int nd_label_active_count(struct nvdimm_drvdata *ndd)
> return 0;
>
> for_each_clear_bit_le(slot, free, nslot) {
> + struct cxl_region_label *region_label;
> struct nd_namespace_label *nd_label;
> -
> - nd_label = to_label(ndd, slot);
> -
> - if (!slot_valid(ndd, nd_label, slot)) {
> - u32 label_slot = nsl_get_slot(ndd, nd_label);
> - u64 size = nsl_get_rawsize(ndd, nd_label);
> - u64 dpa = nsl_get_dpa(ndd, nd_label);
> + union nd_lsa_label *lsa_label;
> + u32 lslot;
> + u64 size, dpa;
> +
> + lsa_label = (union nd_lsa_label *) to_label(ndd, slot);
> + nd_label = &lsa_label->ns_label;
> + region_label = &lsa_label->region_label;
> +
> + if (!slot_valid(ndd, lsa_label, slot)) {
> + if (is_region_label(ndd, lsa_label)) {
> + lslot = __le32_to_cpu(region_label->slot);
> + size = __le64_to_cpu(region_label->rawsize);
> + dpa = __le64_to_cpu(region_label->dpa);
> + } else {
> + lslot = nsl_get_slot(ndd, nd_label);
> + size = nsl_get_rawsize(ndd, nd_label);
> + dpa = nsl_get_dpa(ndd, nd_label);
> + }
>
> dev_dbg(ndd->dev,
> "slot%d invalid slot: %d dpa: %llx size: %llx\n",
> - slot, label_slot, dpa, size);
> + slot, lslot, dpa, size);
> continue;
> }
> count++;
> @@ -607,7 +645,7 @@ struct nd_namespace_label *nd_label_active(struct nvdimm_drvdata *ndd, int n)
> struct nd_namespace_label *nd_label;
>
> nd_label = to_label(ndd, slot);
> - if (!slot_valid(ndd, nd_label, slot))
> + if (!slot_valid(ndd, (union nd_lsa_label *) nd_label, slot))
> continue;
>
> if (n-- == 0)
> diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h
> index 046063ea08b6..c985f91728dd 100644
> --- a/drivers/nvdimm/nd.h
> +++ b/drivers/nvdimm/nd.h
> @@ -344,6 +344,11 @@ region_label_uuid_equal(struct cxl_region_label *region_label,
> return uuid_equal((uuid_t *) region_label->uuid, uuid);
> }
>
> +static inline u32 region_label_get_slot(struct cxl_region_label *region_label)
> +{
> + return __le32_to_cpu(region_label->slot);
> +}
> +
> static inline u64
> region_label_get_checksum(struct cxl_region_label *region_label)
> {
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2025-09-24 21:31 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250917134126epcas5p3e20c773759b91f70a1caa32b9f6f27ff@epcas5p3.samsung.com>
2025-09-17 13:40 ` [PATCH V3 00/20] Add CXL LSA 2.1 format support in nvdimm and cxl pmem Neeraj Kumar
[not found] ` <CGME20250917134130epcas5p417d7c26bc564d64d1bcea6e04d55704d@epcas5p4.samsung.com>
2025-09-17 13:40 ` [PATCH V3 01/20] nvdimm/label: Introduce NDD_REGION_LABELING flag to set region label Neeraj Kumar
2025-09-19 23:10 ` Dave Jiang
2025-09-22 12:41 ` Neeraj Kumar
[not found] ` <CGME20250917134132epcas5p192c031691ab4cbb905f2b2313bb79dee@epcas5p1.samsung.com>
2025-09-17 13:40 ` [PATCH V3 02/20] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Neeraj Kumar
2025-09-19 23:31 ` Dave Jiang
[not found] ` <CGME20250917134134epcas5p3f64af9556015ed9dfb881f852ea854c4@epcas5p3.samsung.com>
2025-09-17 13:40 ` [PATCH V3 03/20] nvdimm/label: Modify nd_label_base() signature Neeraj Kumar
2025-09-19 21:42 ` Ira Weiny
2025-09-19 23:34 ` Dave Jiang
2025-09-22 12:44 ` Neeraj Kumar
2025-09-24 21:02 ` Alison Schofield
2025-09-29 14:07 ` Neeraj Kumar
[not found] ` <CGME20250917134136epcas5p118f18ce5139d489d90ac608e3887c1fc@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 04/20] nvdimm/label: Update mutex_lock() with guard(mutex)() Neeraj Kumar
2025-09-19 21:55 ` Ira Weiny
2025-09-22 12:56 ` Neeraj Kumar
2025-09-19 23:50 ` Dave Jiang
2025-09-20 17:44 ` Ira Weiny
2025-09-22 13:01 ` Neeraj Kumar
2025-09-24 21:42 ` Alison Schofield
2025-09-29 14:19 ` Neeraj Kumar
[not found] ` <CGME20250917134138epcas5p2b02390404681df79c26f7a1a0f0262b8@epcas5p2.samsung.com>
2025-09-17 13:41 ` [PATCH V3 05/20] nvdimm/namespace_label: Add namespace label changes as per CXL LSA v2.1 Neeraj Kumar
2025-09-17 14:54 ` Jonathan Cameron
2025-09-19 22:00 ` Ira Weiny
2025-09-22 13:05 ` Neeraj Kumar
2025-09-19 23:59 ` Dave Jiang
2025-09-22 13:03 ` Neeraj Kumar
2025-09-23 21:48 ` Dave Jiang
2025-09-29 13:28 ` Neeraj Kumar
[not found] ` <CGME20250917134140epcas5p23c007dab49ed7e98726b0dd9a2ce077a@epcas5p2.samsung.com>
2025-09-17 13:41 ` [PATCH V3 06/20] nvdimm/region_label: Add region label update support Neeraj Kumar
2025-09-17 15:36 ` Jonathan Cameron
2025-09-22 13:12 ` Neeraj Kumar
2025-10-06 16:56 ` Dave Jiang
2025-09-22 23:11 ` Dave Jiang
2025-09-29 13:24 ` Neeraj Kumar
[not found] ` <CGME20250917134142epcas5p49d85873cf3ea5f3166c63381ab668fc7@epcas5p4.samsung.com>
2025-09-17 13:41 ` [PATCH V3 07/20] nvdimm/region_label: Add region label delete support Neeraj Kumar
2025-09-22 21:37 ` Dave Jiang
2025-09-29 13:13 ` Neeraj Kumar
[not found] ` <CGME20250917134144epcas5p498fb4b005516fca56e68533ce017fba0@epcas5p4.samsung.com>
2025-09-17 13:41 ` [PATCH V3 08/20] nvdimm/label: Include region label in slot validation Neeraj Kumar
2025-09-22 22:17 ` Dave Jiang
2025-09-29 13:17 ` Neeraj Kumar
2025-09-24 21:30 ` Alison Schofield [this message]
2025-09-29 14:10 ` Neeraj Kumar
[not found] ` <CGME20250917134146epcas5p2a1f3eb1ece0c000eedd06c3201cb8132@epcas5p2.samsung.com>
2025-09-17 13:41 ` [PATCH V3 09/20] nvdimm/namespace_label: Skip region label during ns label DPA reservation Neeraj Kumar
[not found] ` <CGME20250917134148epcas5p1062c53d38d36040a3e65429543099f6d@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 10/20] nvdimm/namespace_label: Skip region label during namespace creation Neeraj Kumar
[not found] ` <CGME20250917134150epcas5p4d5cbd55f1ac51ac23736e855ff2725dc@epcas5p4.samsung.com>
2025-09-17 13:41 ` [PATCH V3 11/20] nvdimm/region_label: Preserve cxl region information from region label Neeraj Kumar
[not found] ` <CGME20250917134153epcas5p1e1f7a7a19fb41d12b9397c3e6265f823@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 12/20] nvdimm/region_label: Export routine to fetch region information Neeraj Kumar
2025-09-23 20:23 ` Dave Jiang
2025-09-29 13:26 ` Neeraj Kumar
[not found] ` <CGME20250917134157epcas5p1b30306bc8596b7b50548ddf3683c3b97@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 13/20] cxl/mem: Refactor cxl pmem region auto-assembling Neeraj Kumar
2025-09-23 22:37 ` Dave Jiang
2025-09-29 13:30 ` Neeraj Kumar
2025-10-06 15:55 ` Dave Jiang
2025-11-07 12:39 ` Neeraj Kumar
2025-11-12 15:55 ` Dave Jiang
2025-11-13 7:27 ` Neeraj Kumar
[not found] ` <CGME20250917134159epcas5p37716c48d36c07aaffe70dafca2fa207b@epcas5p3.samsung.com>
2025-09-17 13:41 ` [PATCH V3 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Neeraj Kumar
2025-09-23 23:50 ` Dave Jiang
2025-09-29 13:37 ` Neeraj Kumar
[not found] ` <CGME20250917134202epcas5p23f718742c74c5b519ecbbc1e04840c03@epcas5p2.samsung.com>
2025-09-17 13:41 ` [PATCH V3 15/20] cxl: Add a routine to find cxl root decoder on cxl bus using cxl port Neeraj Kumar
2025-09-24 18:11 ` Dave Jiang
2025-09-29 13:40 ` Neeraj Kumar
2025-10-06 16:02 ` Dave Jiang
[not found] ` <CGME20250917134203epcas5p3819aee1deecdeaed95bd92d19d3b1910@epcas5p3.samsung.com>
2025-09-17 13:41 ` [PATCH V3 16/20] cxl/mem: Preserve cxl root decoder during mem probe Neeraj Kumar
2025-09-24 18:23 ` Dave Jiang
2025-09-29 13:52 ` Neeraj Kumar
2025-09-24 21:38 ` Alison Schofield
2025-09-29 14:13 ` Neeraj Kumar
[not found] ` <CGME20250917134206epcas5p346640447ba36a00e33ec98c4d35f063b@epcas5p3.samsung.com>
2025-09-17 13:41 ` [PATCH V3 17/20] cxl/pmem: Preserve region information into nd_set Neeraj Kumar
[not found] ` <CGME20250917134209epcas5p1b7f861dbd8299ec874ae44cbf63ce87c@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 18/20] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Neeraj Kumar
2025-09-24 18:53 ` Dave Jiang
2025-09-29 13:57 ` Neeraj Kumar
2025-10-06 16:06 ` Dave Jiang
2025-11-07 12:49 ` Neeraj Kumar
2025-11-12 15:40 ` Dave Jiang
2025-11-13 7:29 ` Neeraj Kumar
2025-10-06 16:09 ` Dave Jiang
[not found] ` <CGME20250917134211epcas5p17cf5e4052df126a67b27be971be82fe1@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 19/20] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion Neeraj Kumar
2025-09-24 20:25 ` Dave Jiang
2025-09-29 14:00 ` Neeraj Kumar
[not found] ` <CGME20250917134213epcas5p139ba10deb2f4361f9bbab8e8490c4720@epcas5p1.samsung.com>
2025-09-17 13:41 ` [PATCH V3 20/20] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem Neeraj Kumar
2025-09-24 20:47 ` Dave Jiang
2025-09-29 14:02 ` Neeraj Kumar
2025-10-06 16:13 ` Dave Jiang
2025-09-17 14:50 ` [PATCH V3 00/20] Add CXL LSA 2.1 format support in nvdimm and " Jonathan Cameron
2025-09-17 15:38 ` Dave Jiang
2025-09-22 12:36 ` Neeraj Kumar
2025-09-23 23:04 ` Alison Schofield
2025-09-29 13:33 ` Neeraj Kumar
2025-09-17 13:29 Neeraj Kumar
[not found] ` <CGME20250917133041epcas5p38c48d254424379593c32f1ea6d141156@epcas5p3.samsung.com>
2025-09-17 13:29 ` [PATCH V3 08/20] nvdimm/label: Include region label in slot validation Neeraj Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aNRjE9gckXeC60-Q@aschofie-mobl2.lan \
--to=alison.schofield@intel.com \
--cc=a.manzanares@samsung.com \
--cc=cpgs@samsung.com \
--cc=gost.dev@samsung.com \
--cc=jonathan.cameron@huawei.com \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=neeraj.kernel@gmail.com \
--cc=nvdimm@lists.linux.dev \
--cc=s.neeraj@samsung.com \
--cc=vishak.g@samsung.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®