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Wed, 08 Oct 2025 07:28:17 -0700 (PDT) Date: Wed, 8 Oct 2025 10:28:15 -0400 From: Yury Norov To: Danilo Krummrich Cc: Joel Fernandes , Alexandre Courbot , linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, dri-devel@lists.freedesktop.org, Alistair Popple , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , bjorn3_gh@protonmail.com, Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , John Hubbard , Timur Tabi , joel@joelfernandes.org, Elle Rhumsaa , Daniel Almeida , Andrea Righi , nouveau@lists.freedesktop.org Subject: Re: [PATCH v6 0/5] Introduce bitfield and move register macro to rust/kernel/ Message-ID: References: <20251003154748.1687160-1-joelagnelf@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Oct 08, 2025 at 12:08:59AM +0200, Danilo Krummrich wrote: > Regarding the bitfields for page table management: Are we > sure that we can use raw bitfields for this? As per my current understanding we can't. Bitfields are not suitable for direct I/O and considered as a data storage. In the current scheme: regs::NV_PFALCON_FALCON_DMATRFBASE::default() .set_base((dma_start >> 8) as u32) .write(bar, &E::ID); we account for endianess in the .write() method, which would be a part of register API, not bitfields. FYI: ARM64 is in process of dropping BE, and Linus announced the end of BE support for RISC-V: https://lore.kernel.org/all/CAHk-=wgYcOiFvsJzFb+HfB4n6Wj6zM5H5EghUMfpXSCzyQVSfA@mail.gmail.com/ Thanks, Yury