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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29034f070ecsm48098155ad.60.2025.10.10.00.02.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Oct 2025 00:02:07 -0700 (PDT) Date: Fri, 10 Oct 2025 00:02:05 -0700 From: Qiang Yu To: Konrad Dybcio Cc: Pankaj Patil , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prudhvi Yarlagadda Subject: Re: [PATCH 19/24] arm64: dts: qcom: glymur: Add support for PCIe5 Message-ID: References: <20250925-v3_glymur_introduction-v1-0-24b601bbecc0@oss.qualcomm.com> <20250925-v3_glymur_introduction-v1-19-24b601bbecc0@oss.qualcomm.com> <75d8cdc7-60c1-44a8-bf6c-0fb1ef38dd70@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <75d8cdc7-60c1-44a8-bf6c-0fb1ef38dd70@oss.qualcomm.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA4MDEyMSBTYWx0ZWRfX5X3Zi80DLGaB Sj+AZfT1AVwU7/x3EIgX+KmJuNwwgNpOUeuCPSzGHDVKIGMmMKa1oPyldOUSRAXNBdkmoCWMl9p M7I9p29nGnS5AgSzCo29JoCdvm2W3IKVtXR7UuNjmoWOXwrAdU8GCCNmDBcAkyIDsKZVh4ZFIi7 oMy9XMVrHT1Xq/FIvEwDzCbcTdB2OKRZHszsX4EG9Zq8+hqSs8U7NI1Fnkr5pEFbWqcgzOO25h2 wtCzwtNyrncsJC6lyw4Z2SbYCWpyuzKAld5iknH+tEkbNIDCe12aAgFMipIaQ6lCLXwP5jAJjXW eL10jg19YAttsTWjGYvzrAlYlW2NHroci2J9jBFqW5dt6nvZv9cBc/SvXm0SaKoqtlkOIil3iaO 61IuswUsJG/FmOs6jcQ7c/QUOvLLwg== X-Authority-Analysis: v=2.4 cv=CbcFJbrl c=1 sm=1 tr=0 ts=68e8af71 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=x6icFKpwvdMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=z4uItHPOzOwcMgdkeGIA:9 a=CjuIK1q_8ugA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: -9nq3IZVxjqOdiL0rMappiJBZmPYToLM X-Proofpoint-ORIG-GUID: -9nq3IZVxjqOdiL0rMappiJBZmPYToLM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-10_01,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510080121 On Thu, Sep 25, 2025 at 01:32:04PM +0200, Konrad Dybcio wrote: > On 9/25/25 8:32 AM, Pankaj Patil wrote: > > From: Prudhvi Yarlagadda > > > > Describe PCIe5 controller and PHY. Also add required system resources like > > regulators, clocks, interrupts and registers configuration for PCIe5. > > > > Signed-off-by: Prudhvi Yarlagadda > > Signed-off-by: Qiang Yu > > Signed-off-by: Pankaj Patil > > --- > > [...] > > > + pcie5: pci@1b40000 { > > + device_type = "pci"; > > + compatible = "qcom,glymur-pcie", "qcom,pcie-x1e80100"; > > + reg = <0x0 0x01b40000 0x0 0x3000>, > > + <0x7 0xa0000000 0x0 0xf20>, > > + <0x7 0xa0000f40 0x0 0xa8>, > > + <0x7 0xb0000000 0x0 0x4000>, > > + <0x7 0xa0100000 0x0 0x100000>, > > + <0x0 0x01b43000 0x0 0x1000>; > > + reg-names = "parf", > > + "dbi", > > + "elbi", > > + "atu", > > + "config", > > + "mhi"; > > + #address-cells = <3>; > > + #size-cells = <2>; > > + ranges = <0x02000000 0 0x7a000000 0 0x7a000000 0 0x4000000>; > > No I/O space? We can also add the (presumably prefetchable) 64-bit range Will add I/O space and prefetchable mem space since we don't know which device user may insert. > > > > + pcie5port0: pcie@0 { > > pcie5_port0: > > > + device_type = "pci"; > > + reg = <0x0 0x0 0x0 0x0 0x0>; > > + bus-range = <0x01 0xff>; > > + > > + #address-cells = <3>; > > + #size-cells = <2>; > > + ranges; > > + phys = <&pcie5_phy>; > > same comment as on the other patch > Will change the order as you commented for kaanapali patch. device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>; phys = <&pcie0_phy>; #address-cells = <3>; #size-cells = <2>; ranges; - Qiang Yu > Konrad