On Wed, Oct 15, 2025 at 04:28:15PM +0200, Herve Codina (Schneider Electric) wrote:
> The ADC available in the r9a06g032 SoC can use up to two internal ACD
> cores (ADC1 and ADC2) those internal cores are handled through ADC
> controller virtual channels.
> 
> Describe this device.
> 
> Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com>

Looks good given the current bindings. Despite clock-names will need an update:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>