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[96.255.20.138]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-87d028af525sm59946d6.51.2025.10.17.07.59.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Oct 2025 07:59:03 -0700 (PDT) Date: Fri, 17 Oct 2025 10:59:01 -0400 From: Gregory Price To: Jonathan Cameron Cc: Yiannis Nikolakopoulos , Wei Xu , David Rientjes , Matthew Wilcox , Bharata B Rao , linux-kernel@vger.kernel.org, linux-mm@kvack.org, dave.hansen@intel.com, hannes@cmpxchg.org, mgorman@techsingularity.net, mingo@redhat.com, peterz@infradead.org, raghavendra.kt@amd.com, riel@surriel.com, sj@kernel.org, ying.huang@linux.alibaba.com, ziy@nvidia.com, dave@stgolabs.net, nifan.cxl@gmail.com, xuezhengchu@huawei.com, akpm@linux-foundation.org, david@redhat.com, byungchul@sk.com, kinseyho@google.com, joshua.hahnjy@gmail.com, yuanchu@google.com, balbirs@nvidia.com, alok.rathore@samsung.com, yiannis@zptcorp.com, Adam Manzanares Subject: Re: [RFC PATCH v2 0/8] mm: Hot page tracking and promotion infrastructure Message-ID: References: <20250925160058.00002645@huawei.com> <20250925162426.00007474@huawei.com> <20250925182308.00001be4@huawei.com> <20251017153613.00004940@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251017153613.00004940@huawei.com> On Fri, Oct 17, 2025 at 03:36:13PM +0100, Jonathan Cameron wrote: > On Fri, 17 Oct 2025 10:15:57 -0400 > Gregory Price wrote: > > > > Essentially the platform needs to allow a single device to expose > > multiple numa nodes based on different expected performance. From > > those ranges. Then software needs to program the HDM decoders > > appropriately. > > It's a bit 'fuzzy' to justify but maybe (for CXL) a CFWMS flag (so CEDT > as you mention) to say this host memory region may be backed by > compressed memory? > > Might be able to justify it from spec point of view by arguing that > compression is a QoS related characteristic. Always possible host > hardware will want to handle it differently before it even hits the > bus even if it's just a case throttling writing differently. > That's a Consortium discussion to have (and I am not of the consortium :P), but yeah you could do it that way. More generally could have a "Not-for-general-consumption bit" instead of specifically a compressed bit. Maybe both a "No-Consume" and a "Special Node" bit would be useful separately. Of course then platforms need to be made to understand all these: "No-Consume" -> force EFI_MEMORY_SP or leave it reserved "Special Node" -> allocate its own PXM / Provide discrete CFMWS Naming obviously non-instructive here, may as well call them Nancy and Bob bits. > That then ends up in it's own NUMA node. Whether we take on the > splitting CFMWS entries into multiple NUMA nodes depending on what > backing devices end up in them is something we kicked into the long > grass originally, but that can definitely be revisited. That > doesn't matter for initial support of compressed memory though if > we can do it via a seperate CXL Fixed Memory Window Structure (CFMWS) > in CEDT. > This is the way I would initially approach it tbh - but i'm also not a hardware/firmware person, so i don't know exactly what bits a device would set to tell BIOS/EFI "Hey, give this chunk its own CFMWS", or if that lies solely with BIOS/EFI. ~Gregory