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Thu, 20 Nov 2025 02:16:55 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29b5b25e337sm21332285ad.48.2025.11.20.02.16.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Nov 2025 02:16:55 -0800 (PST) Date: Thu, 20 Nov 2025 15:46:51 +0530 From: Abhinaba Rakshit To: Bjorn Andersson Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] soc: qcom: ice: Set ICE clk to turbo on probe Message-ID: References: <20251001-set-ice-clock-to-turbo-v1-1-7b802cf61dda@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-GUID: 1hDXLDCRBMzhMLsVnBzsX1-oGS3IOKN6 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTIwMDA2MSBTYWx0ZWRfX4maODMt3sf72 9wIAusJgTIDyAzyvlsyM8gXIAuWYti1iVr2ycDoB5jwcY29gP8E+xso9HG7PFhhPf67wlMqIYQi g2C1L25Iu7q3ZjLXRkL+VYj7cjUcPQTzX8To2hVGB/YFT3BuVqFKdER/e2s1tzjucX9N53EpQN8 2PdA4tjoGEtBX4V+52x59oSx73af9FZZxxx+BUeIXT3LTIN8LHs7DUAu8++DkRiu7AVkEgYqLHB SnAsKahBnWaR2zgrGJarbIdbXrwtKNccE/GG9KjhTqDYNF6oIScY8/Nh3Tj0YZt0zfYQ528mimt h0SJNNUdR4C03jfCRstYkzG+GZBS3jIfgMykCaP+GXRswJcDfzS+s6SgdcmzCXvtncRbXhkFUdw eJ7SrZ/pyqGdYUtB4fVJ0ekVpyKLDA== X-Proofpoint-ORIG-GUID: 1hDXLDCRBMzhMLsVnBzsX1-oGS3IOKN6 X-Authority-Analysis: v=2.4 cv=PJICOPqC c=1 sm=1 tr=0 ts=691eea98 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=QWYJWqraYEHugMdX4MUA:9 a=CjuIK1q_8ugA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-20_03,2025-11-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 phishscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511200061 On Wed, Oct 01, 2025 at 10:13:56PM -0500, Bjorn Andersson wrote: > On Wed, Oct 01, 2025 at 05:44:32PM +0530, Abhinaba Rakshit wrote: > > Set ICE core clock to turbo (max freq) provided by dt > > entry at ice device probe. > > > > Signed-off-by: Abhinaba Rakshit > > --- > > MMC controller lacks a clock scaling mechanism, unlike the UFS > > controller. By default, the MMC controller is set to TURBO mode > > during probe, but the ICE clock remains at XO frequency, > > leading to read/write performance degradation on eMMC. > > > > To address this, set the ICE clock to TURBO during probe to > > align it with the controller clock. This ensures consistent > > performance and avoids mismatches between the controller > > and ICE clock frequencies. > > I think this (the snippet between the "---" lines) looks like a quite > good commit message; but it's below the first "---" and as such not > actually part of the commit message and will be ignored by the tools. > > At the same time, the actual commit message ("Set ICE core...") isn't > very good at all, it completely lacks the problem description you > provide here. > > Please use this for your commit message instead. Sure, will update this properly in patchset v2. > > > --- > > drivers/soc/qcom/ice.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c > > index ec8d6bb9f426deee1038616282176bfc8e5b9ec1..eee06c499dc36a6bf380361f27e938331f1fcb10 100644 > > --- a/drivers/soc/qcom/ice.c > > +++ b/drivers/soc/qcom/ice.c > > @@ -535,6 +535,7 @@ static struct qcom_ice *qcom_ice_create(struct device *dev, > > struct qcom_ice *engine; > > const __be32 *prop; > > int len; > > + int err; > > > > if (!qcom_scm_is_available()) > > return ERR_PTR(-EPROBE_DEFER); > > @@ -577,6 +578,13 @@ static struct qcom_ice *qcom_ice_create(struct device *dev, > > if (!qcom_ice_check_supported(engine)) > > return ERR_PTR(-EOPNOTSUPP); > > > > + /* Set the ICE clk rate to TURBO */ > > + if (engine->core_clk && engine->max_freq) { > > + err = clk_set_rate(engine->core_clk, engine->max_freq); > > + if (err) > > + dev_err(dev, "Failed setting the clk to TURBO\n"); > > + } > > + > > dev_dbg(dev, "Registered Qualcomm Inline Crypto Engine\n"); > > > > return engine; > > > > --- > > base-commit: 3b9b1f8df454caa453c7fb07689064edb2eda90a > > change-id: 20251001-set-ice-clock-to-turbo-ecab9ea46a89 > > prerequisite-change-id: 20251001-enable-ufs-ice-clock-scaling-9c55598295f6:v1 > > prerequisite-patch-id: d66f521e5e625b295a1c408cdfce9bd9524ae3ba > > prerequisite-patch-id: 23934f3fee5aabe4a2324130ed02909352b5cf61 > > We do have plenty of platforms that run the upstream kernel without any > changes, so please test your patch on a clean upstream kernel tree. > > Thanks, > Bjorn > Sure, Most of the scaling operations will be a optional configuration, which should not break existing platforms. However, will ensure that in patchset v2. > > > > Best regards, > > -- > > Abhinaba Rakshit > >