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Bottomley" , "Martin K. Petersen" , Neeraj Soni , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: Re: [PATCH v2 1/3] soc: qcom: ice: Add OPP-based clock scaling support for ICE Message-ID: References: <20251121-enable-ufs-ice-clock-scaling-v2-0-66cb72998041@oss.qualcomm.com> <20251121-enable-ufs-ice-clock-scaling-v2-1-66cb72998041@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Proofpoint-GUID: VFriYMGT57fEBJYMKmwUbXDnyUsRAhkf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA4MDA1NSBTYWx0ZWRfX4JR5Y2HD01V2 JSedpYYZJVJ/e3okB3E8If6gr8jbmfFgjhrBTlMGls/3FX0W33GwDWU69A16pMwVg9tlR4KeEJu SjTVnVJoWLvN0MPe1loOdDrF7eiGFh8cI5H7pSQt5f9RneIzE0qFw2i6fzY2afBiZS2chSSuA5i o2DhkRdITQbCjZw+CDePz7Vw8TYzAKvtcMBg2l611XbdRutO7XpS+D/jkIsodbCfMrgRwqgsQTz gc0JRSkvM6M3fhi36R3HQ1NbOtA0T252Ll6gRyNKpMkeCQLU4aYxEMeA2sJcff4ZgzhR1ddzgzf WQhzlcfUpEzj4QfhborWMgBoF7P0Qyn8uP9RAxGkpWIaDWPI8Mi5XJdLIDmbvWyMnwLAyuaZC53 sqiQ0OsCd58jqU/XXkM6ThVyHOhfVQ== X-Proofpoint-ORIG-GUID: VFriYMGT57fEBJYMKmwUbXDnyUsRAhkf X-Authority-Analysis: v=2.4 cv=NsHcssdJ c=1 sm=1 tr=0 ts=69367316 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=2r6_o0aEtt8sHetHFGkA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-06_02,2025-12-04_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 clxscore=1015 phishscore=0 priorityscore=1501 malwarescore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512080055 On Fri, Nov 21, 2025 at 02:46:52PM +0100, Konrad Dybcio wrote: > On 11/21/25 11:36 AM, Abhinaba Rakshit wrote: > > Register optional operation-points-v2 table for ICE device > > and aquire its minimum and maximum frequency during ICE > > device probe. > > > > Introduce clock scaling API qcom_ice_scale_clk which scale ICE > > core clock if valid (non-zero) frequencies are obtained from > > OPP-table. Zero min and max (default values) frequencies depicts > > clock scaling is disabled. > > > > When an ICE-device specific OPP table is available, use the PM OPP > > framework to manage frequency scaling and maintain proper power-domain > > constraints. For legacy targets without an ICE-device specific OPP table, > > fall back to the standard clock framework APIs to set the frequency. > > You can still set a frequency through OPP APIs if the table is empty > (and one is always created even if devm_pm_opp_of_add_table() fails) > We observed that when devm_pm_opp_of_add_table() returns -ENODEV (indicating that no OPP table is defined in the devicetree), subsequent calls to APIs like dev_pm_opp_set_rate() fail because the device does not have an OPP table registered. As a result, the clock rate cannot be set using OPP-based helpers. Here is an dmesg ice driver logs for lemans device without opp-table defined in its devicetree. sh-5.2# dmesg | grep qcom-ice [ 7.316366] qcom-ice 87c8000.crypto: dev_pm_opp_set_rate: device's opp table doesn't exist [ 7.325596] qcom-ice 87c8000.crypto: Failed boosting the ICE clk to TURBO [ 7.333288] qcom-ice 87c8000.crypto: _find_key: OPP table not found (-19) [ 7.340968] qcom-ice 87c8000.crypto: Unable to find ICE core clock min freq [ 7.348832] qcom-ice 87c8000.crypto: _find_key: OPP table not found (-19) [ 7.356510] qcom-ice 87c8000.crypto: Unable to find ICE core clock max freq [ 7.364377] qcom-ice 87c8000.crypto: Found QC Inline Crypto Engine (ICE) v3.2.0 [ 7.372594] qcom-ice 87c8000.crypto: QC ICE HWKM (Hardware Key Manager) version = 1 Additionally, on legacy targets where ICE does not exist as a separate device, the OPP table is managed through the storage subsystem. In such cases, using OPP APIs directly for ICE would not be appropriate because the OPP table may also control other clocks, leading to unintended side effects. > [...] > > > /* > > * Legacy DT binding uses different clk names for each consumer, > > - * so lets try those first. If none of those are a match, it means > > - * the we only have one clock and it is part of the dedicated DT node. > > - * Also, enable the clock before we check what HW version the driver > > - * supports. > > + * so lets try those first. Also get its corresponding clock index. > > + */ > > I would argue *not* setting the rate on targets utilizing a binding without > an OPP table for the ICE is probably a smart thing to do, because we may > brownout the SoC this way Understand the concern here. However, our approach is to scale the ICE clock only when the storage subsystem scales its own clocks. Since the storage driver already manages the associated power domain and voltage adjustments (even for targets without opp-table for ICE) —which are shared with ICE—this ensures that any frequency changes occur in a safe context. As a result, the risk of a SoC brownout condition should be effectively mitigated. > > Konrad