From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA96F13790B for ; Thu, 18 Dec 2025 16:42:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766076167; cv=none; b=FQgFb0mtQqPmKCayQADMhH2dTPZuOLJbiVjOIXYpISpNNlP3aS1WHvqqFvZB5n/H4cDA+eRxiwWkye+QKbb5TaUwwtgmZ/ew4Kl2qYgtRkRK+nQaXIsTMC8eIfsPm0Kv+xfB0OGHTGZtRILFx33ATbV6f7j+ITS7jl1/KkG6Tuw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766076167; c=relaxed/simple; bh=btvc2jktmF+7SAu2JcVFJ+v3fCICkZ0RXvPo9gzYvlc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=hBnCHGNNFU56YiPtfVCKYkQsW/SL6W35Gem0ZWB7aJXvkpEjYi12jvj90lzmHHcL99RtxWjKK6W8kL7oXSLHi2pOUNa0bAbVpkqV7JmQtjjZk/bpldxlhWnLuXagzRuenEKFwzgsRSRwKc5ueMD2rPcSedzvHSCGxaVmkvIZf9Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=xok0HtlB; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="xok0HtlB" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4779e2ac121so73435e9.1 for ; Thu, 18 Dec 2025 08:42:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1766076164; x=1766680964; darn=vger.kernel.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=+IFgshQmWOBMUvxTwruPAcrC79l+n1VOqPFKCVMtLyY=; b=xok0HtlBLjcfYRL+2kJCeii6bMOdrMXrF17Wj0as/jSPWCTBGq+xtfZ14aX72lUJ+n d9oNDphbTY3MmL+GpU7N1nE6bvE4T+N6Rah01+9rrWiYHdRXdXqs95vrTjIGp+QkniZh OdaLViASjHU/OxjI5ROi7BB29h1gGvTyRpssXk1kV8KMrjsG1zFb0a5gi3IWHO36N0QA 9LXtTcJtiMrV/2K6KkA3IBPqGPpF9sKr1kSNiPgOhOsaDGL72PZ6c3gdlUC8BOZRl+Sd MLuhkA/RuvDe0xQW5o53hJVuC6MJyZm2XIoXCPKUlNmyYMi2rnOosM7lVES6/25Mvm2H 8NLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766076164; x=1766680964; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=+IFgshQmWOBMUvxTwruPAcrC79l+n1VOqPFKCVMtLyY=; b=JPWA/ig2zyKgFjtxfkm71YW2VbP6GO0bFPTA5d8HoeTkO3e5f29gA+lqukzR88g0CO PdG6t/1mBegsN0Y+drs21+1+vRvbt+VyhyEYtzLwKt0IwvQBnQROq4jI0AuJ79V80ete CtUAI2rDqeZcJ9ISFcsTX0Usz0QEZMqg5VkqV/CpqpfsmC0s/vNwOO9SAwda5unovbzB bT5/XeIMUep8N0t1lnsJAw8naGzbfS2lo/F7CZV/e4eeC7wJenlpiaWBjg/bL8LYuvzW 2dtRGJHcKTuWUzCIvB6mhTSUE+lb9HBYOYcK6jZjFKENzD1yE0wRU7q5ICp9a5eYFQXs si2w== X-Forwarded-Encrypted: i=1; AJvYcCVpAnbmC4m7FWw2mx9sM+TXL4FXHFM1Y3RhkS48osCOX1RmHVqqvqXikmgnB5aKoKH1PAvV7Kdua4E+kEo=@vger.kernel.org X-Gm-Message-State: AOJu0Yyqye3ilmhrzaGZJ5DSvgiatG8Yh8l7lpyvGeHA0iXaqF2i8XLj 8jFBZ8XqxaaWNsmYle9W2dcxglsNLRe1ZfUGMmFWb2UnqbIOAwhTS3wTtPWi3YN4wg== X-Gm-Gg: AY/fxX4Oul/GcO3XoLe+n0j9scuroWbiRL6ICjhnRHzcPFKQb442Sp/u+Nq660burIv 6AGAJXq5bvQl1T2dDQnzOJVobfpSPhE+VyRF4D9pXUnD7eusU7eaD6QrY1WfQqCe8HgJ9CxPskP Uz1WrjIhm2a8la8CVT9E18S3+5k6uVAMXN6b6GuAPKfOiZ4TEFp+uDKFQ1+zBMWrjAATsnet8Hm m8oiTBj4SKWpDDVlF7t8mMzF1hUkQQqi3A1jEws03l01wxZn+mCtfYjqzTH1/Bx/vMeQRO1mwG6 DQSRoTePW9nu+q67wCKcCDbFaBuNgOij5pWHonhI9PYK4Ex5cH57saZ0UKCskP+yboptowMaffA hnKHQrx4n+jhCDTEtPF0vrfDi0jKU8uJUmIP+x6HC39bMJCr4bKwmtwNr1q+qQrWo7xJtUCi4db fh0hxi+CYuXZN2WW+HDFEcMfq0VvSz1tWiUxpoeYyOewiR0+/OJbv7X1VhFfG3Hzg= X-Google-Smtp-Source: AGHT+IHHeIFx2+0vxOZyFtZ+vCiLpMtmd8EAFHGp/iCDxGY1OQ+0R1arRjVNTaj9Hz0mThE+88JGgw== X-Received: by 2002:a05:600c:574b:b0:47a:8a6d:f4f0 with SMTP id 5b1f17b1804b1-47bf6b69182mr447195e9.1.1766076164138; Thu, 18 Dec 2025 08:42:44 -0800 (PST) Received: from google.com (171.85.155.104.bc.googleusercontent.com. [104.155.85.171]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-432449adac0sm6085692f8f.42.2025.12.18.08.42.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Dec 2025 08:42:43 -0800 (PST) Date: Thu, 18 Dec 2025 16:42:40 +0000 From: Mostafa Saleh To: Nicolin Chen Cc: jgg@nvidia.com, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, skolothumtho@nvidia.com, praan@google.com, xueshuai@linux.alibaba.com Subject: Re: [PATCH rc v4 3/4] iommu/arm-smmu-v3: Mark STE EATS safe when computing the update sequence Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, Dec 16, 2025 at 08:26:01PM -0800, Nicolin Chen wrote: > From: Jason Gunthorpe > > If a VM wants to toggle EATS off at the same time as changing the CFG, the > hypervisor will see EATS change to 0 and insert a V=0 breaking update into > the STE even though the VM did not ask for that. > > In bare metal, EATS is ignored by CFG=ABORT/BYPASS, which is why this does > not cause a problem until we have nested where CFG is always a variation of > S2 trans that does use EATS. > > Relax the rules for EATS sequencing, we don't need it to be exact because > the enclosing code will always disable ATS at the PCI device if we are > changing EATS. This ensures there are no ATS transactions that can race > with an EATS change so we don't need to carefully sequence these bits. > > Fixes: 1e8be08d1c91 ("iommu/arm-smmu-v3: Support IOMMU_DOMAIN_NESTED") > Cc: stable@vger.kernel.org > Signed-off-by: Jason Gunthorpe > Reviewed-by: Shuai Xue > Signed-off-by: Nicolin Chen > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 12a9669bcc83..a3b29ad20a82 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -1095,6 +1095,15 @@ void arm_smmu_get_ste_update_safe(__le64 *safe_bits) > * fault records even when MEV == 0. > */ > safe_bits[1] |= cpu_to_le64(STRTAB_STE_1_MEV); > + > + /* > + * EATS is used to reject and control the ATS behavior of the device. If > + * we are changing it away from 0 then we already trust the device to > + * use ATS properly and we have sequenced the device's ATS enable in PCI > + * config space to prevent it from issuing ATS while we are changing > + * EATS. > + */ I am not sure about this one, Is it only about trusting the device? I’d be worried about cases where we switch domains, that means that briefly the HW observers EATS=1 while it was not intended, especially that EATS is in a different DWORD from S2TTB and CDptr. With all the IOMMUFD/VFIO stuff it makes it harder to reason about. But I can’t come up with an example to break this. Thanks, Mostafa > + safe_bits[1] |= cpu_to_le64(STRTAB_STE_1_EATS); > } > EXPORT_SYMBOL_IF_KUNIT(arm_smmu_get_ste_update_safe); > > -- > 2.43.0 >