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Mon, 22 Dec 2025 22:58:08 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a2f3d4d858sm118676475ad.57.2025.12.22.22.58.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Dec 2025 22:58:07 -0800 (PST) Date: Tue, 23 Dec 2025 12:28:02 +0530 From: Abhinaba Rakshit To: Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: qcom: monaco: add QCrypto node Message-ID: References: <20251222-enable-qualcomm-crypto-engine-for-monaco-v1-1-06741d6ea66a@oss.qualcomm.com> <76fcf840-e0ce-4647-bff7-4d2f6ac09777@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <76fcf840-e0ce-4647-bff7-4d2f6ac09777@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: eYRD0VxD4PNn2JsQBV1hBtBUgN-NrQaZ X-Proofpoint-GUID: eYRD0VxD4PNn2JsQBV1hBtBUgN-NrQaZ X-Authority-Analysis: v=2.4 cv=asi/yCZV c=1 sm=1 tr=0 ts=694a3d81 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=N-RZRtAeA9jCEb56goQA:9 a=CjuIK1q_8ugA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIzMDA1NyBTYWx0ZWRfX2wmt0sdzJT4L 0sZCAxMGRDtOUPpMvG1lpiPMxSSuASRXfPL5g21knXjRSCLWhUUBIUJj49/PNaExkHxnWbQfypO 9O3PI/YYYl2C3mmRAJG/GBznuysmZU0zXrk2laW+0pZpr7ZRH2CXOgDvbwqimOR/XzPhFD1bMtn Ts1RHWholqzZ1fzoFI0sO5I5aBFqEhrAgkWkwyfWaVQlgcgoke69A55h8RNxUBVB87euZ/soGbT TlVaeEi8TnGvio9x5vDs8H5YM04G/BcGEKdASjoFDT2KLaapUXQ690FPH2+sJphisHQjkaNlJqT xv/qZLSuA+PMfllJ+zo41sbOMTviyFtGgLD+6tWJqxTfeFfiAdyFAd8N+8qPv8DlG5g2Y8+3pjE wLD9EApU28zjkGRXHaq+x1txhHtqS78xAbODcP5gfRELYBrbmXKXhrXHZLltg2xAMcC2xCzB+nY oOeTMK/2jQpR0T6LY8w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-23_02,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 malwarescore=0 adultscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512230057 On Mon, Dec 22, 2025 at 10:44:49AM +0100, Konrad Dybcio wrote: > On 12/22/25 8:30 AM, Abhinaba Rakshit wrote: > > Add Qualcomm Crypto Engine device node for Monaco platform. > > Bindings and Crypto DMA nodes for the same platform is already > > present in the tree. > > > > QCE and Crypto DMA nodes patch was applied as part of the > > commit a86d84409947 ("arm64: dts: qcom: qcs8300: add QCrypto nodes"), > > however was reverted due to compatible string being miss-matched > > against schema. > > > > Resubmitting the enablement of QCE device node for monaco platform > > with compatible-string being aligned with qcom-qce schema. > > > > Signed-off-by: Abhinaba Rakshit > > --- > > arch/arm64/boot/dts/qcom/monaco.dtsi | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi > > index 816fa2af8a9a663b8ad176f93d2f18284a08c3d1..dd0b9ea27fe1cdfbf6aba07e98183871be7ee889 100644 > > --- a/arch/arm64/boot/dts/qcom/monaco.dtsi > > +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi > > @@ -2350,6 +2350,18 @@ ice: crypto@1d88000 { > > clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; > > }; > > > > + crypto: crypto@1dfa000 { > > + compatible = "qcom,qcs8300-qce", "qcom,sm8150-qce", "qcom,qce"; > > + reg = <0x0 0x01dfa000 0x0 0x6000>; > > + dmas = <&cryptobam 4>, <&cryptobam 5>; > > + dma-names = "rx", "tx"; > > + iommus = <&apps_smmu 0x480 0x00>, > > "0x00" makes no sense - "0x0" is the concise way to write it and > "0x0000" would be pedantic with the width of the SMR mask field in mind. > > Please switch to the former > Sure, will update this in patchset v2. Abhinaba Rakshit