From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AC542230BCB for ; Wed, 7 Jan 2026 14:44:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767797085; cv=none; b=fr4Rg4qanrMaLtoCXIF3+3zRECZ+SoOBQDomXg31BpKGV9FX7Vn+7v2UHLveZ3QRYAlpCFMtcSdaCRMJB7MTrYs9QgoXDtUI2G67vsHjeW0bhlW8vbVSg2FPAEsbn80asPrhwqyQOZD9b2ry50GMsbyuRwjcE9NqtSq/TE/4ToE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767797085; c=relaxed/simple; bh=RmXiZ8pAWBfwInIK2yn9LJIFjY6578DxFLYi74rPmGs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=AHxV9GwYHK4LdBC4OtrfrwlwZuPRCLxJ6I330U2wLN6tcm89tgG+cPRr3IyMyIjwLoR7bVyCSGzJkaldL8pz7qa42tBg57n3QexRr0rZJdVR/9nVxl7z55W9Zooto+QQoNEjuywHqqq4YX9bCErbJZevovVNqpxVEDcX6IgLEQo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 229F7497; Wed, 7 Jan 2026 06:44:36 -0800 (PST) Received: from localhost (a079125.arm.com [10.164.21.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 21E253F6A8; Wed, 7 Jan 2026 06:44:41 -0800 (PST) Date: Wed, 7 Jan 2026 20:14:38 +0530 From: Linu Cherian To: Ryan Roberts Cc: Will Deacon , Ard Biesheuvel , Catalin Marinas , Mark Rutland , Linus Torvalds , Oliver Upton , Marc Zyngier , Dev Jain , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 13/13] arm64: mm: Provide level hint for flush_tlb_page() Message-ID: References: <20251216144601.2106412-1-ryan.roberts@arm.com> <20251216144601.2106412-14-ryan.roberts@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251216144601.2106412-14-ryan.roberts@arm.com> On Tue, Dec 16, 2025 at 02:45:58PM +0000, Ryan Roberts wrote: > Previously tlb invalidations issued by __flush_tlb_page() did not > contain a level hint. But the function is clearly only ever targeting > level 3 tlb entries and its documentation agrees: > > | this operation only invalidates a single, last-level page-table > | entry and therefore does not affect any walk-caches > > However, it turns out that the function was actually being used to > invalidate a level 2 mapping via flush_tlb_fix_spurious_fault_pmd(). The > bug was benign because the level hint was not set so the HW would still > invalidate the PMD mapping, and also because the TLBF_NONOTIFY flag was > set, the bounds of the mapping were never used for anything else. > > Now that we have the new and improved range-invalidation API, it is > trival to fix flush_tlb_fix_spurious_fault_pmd() to explicitly flush the > whole range (locally, without notification and last level only). So > let's do that, and then update __flush_tlb_page() to hint level 3. > > Signed-off-by: Ryan Roberts > --- > arch/arm64/include/asm/pgtable.h | 5 +++-- > arch/arm64/include/asm/tlbflush.h | 2 +- > 2 files changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index b96a7ca465a1..61f57647361a 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -138,8 +138,9 @@ static inline void arch_leave_lazy_mmu_mode(void) > #define flush_tlb_fix_spurious_fault(vma, address, ptep) \ > __flush_tlb_page(vma, address, TLBF_NOBROADCAST | TLBF_NONOTIFY) > > -#define flush_tlb_fix_spurious_fault_pmd(vma, address, pmdp) \ > - __flush_tlb_page(vma, address, TLBF_NOBROADCAST | TLBF_NONOTIFY) > +#define flush_tlb_fix_spurious_fault_pmd(vma, address, pmdp) \ > + __flush_tlb_range(vma, address, address + PMD_SIZE, PMD_SIZE, 2, \ > + TLBF_NOBROADCAST | TLBF_NONOTIFY | TLBF_NOWALKCACHE) > > /* > * ZERO_PAGE is a global shared page that is always zero: used > diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h > index fa5aee990742..f24211b51df3 100644 > --- a/arch/arm64/include/asm/tlbflush.h > +++ b/arch/arm64/include/asm/tlbflush.h > @@ -577,7 +577,7 @@ static inline void __flush_tlb_page(struct vm_area_struct *vma, > unsigned long start = round_down(uaddr, PAGE_SIZE); > unsigned long end = start + PAGE_SIZE; > > - ___flush_tlb_range(vma, start, end, PAGE_SIZE, TLBI_TTL_UNKNOWN, > + ___flush_tlb_range(vma, start, end, PAGE_SIZE, 3, > TLBF_NOWALKCACHE | flags); > } Reviewed-by: Linu Cherian