From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A044342EEDE for ; Tue, 20 Jan 2026 16:23:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768926184; cv=none; b=VsPYHGjOsPbMuoJCHuqvAMR6pvXC81t/7jN2PzgHZ7MV8N7wXwE0o51K1Q4CeTF51gmmCVF/oRirtv8WCpT8J7AQNzxjsdRZtyjl7ce5nfVpFkBfArT04QgSpDpKrHdUr+8qCcgsoaYmMCyACsuyKVg7KmPVyCrNsLfWI5WoYrI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768926184; c=relaxed/simple; bh=YTWLyKe7EwgWKlys6auiawAT5yUxkGGTJWod4qd6PSg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=lf3XlIq4/hil4RZ3ej76qz/50GUDTXT0TMfj0W2pgRnfe2PtTm5Zkwqu+aej/zunHKqrcO5d3BpfwKlGSSwpuAaea0THBz+lenO5Mnvc2ojksxv5BUGZviKdVHPjK/wN7LLPOKML3n+tG/55BivQAPfaC0JHVxfN4iY4YvxId+M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Yw2W2rae; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Yw2W2rae" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1768926183; x=1800462183; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=YTWLyKe7EwgWKlys6auiawAT5yUxkGGTJWod4qd6PSg=; b=Yw2W2raelgAKXHzp4rh54290blkkZaLNtljyNtpG0KeLBRg0NR26ccwX KbCvAElbrjVAtHUfNvnav+8BSIxyk0d6+++zQVMycNOyiJKLPIaUVZ0kN pqL5sQptcvS4+CiQztEQeSK47RPQgAdKIbk+WO1JoZIsDYYNpDYGoxfsE Waf0bpYjPJ4CIVF8+e6rRJlnOsSvtDOLc5o6Ht6l/0IKpglciZxwEeLM/ ZQQSK6k/HnTHPJ0Fpa86hqgxCDEPRio1rRomTAY5JbUS+Wq7t8QK79d5E lFFqKw4Vtvjst5U3D02DbIfueK6qkXOx81knUKpPPZL0M96HNwRbTrYHy g==; X-CSE-ConnectionGUID: cyvUFTdTSKa9M62VPUd3KA== X-CSE-MsgGUID: KxfD8fVyTWe5ZGH9ShRMMA== X-IronPort-AV: E=McAfee;i="6800,10657,11677"; a="87551499" X-IronPort-AV: E=Sophos;i="6.21,241,1763452800"; d="scan'208";a="87551499" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2026 08:23:02 -0800 X-CSE-ConnectionGUID: T53hiD1kQhejZPmMQFdDgA== X-CSE-MsgGUID: 2oMOM50gQZWbU0k+IQlAEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,241,1763452800"; d="scan'208";a="229105898" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa002.fm.intel.com with ESMTP; 20 Jan 2026 08:22:59 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 6365298; Tue, 20 Jan 2026 17:22:58 +0100 (CET) Date: Tue, 20 Jan 2026 17:22:58 +0100 From: Andy Shevchenko To: Dave Hansen Cc: Dave Hansen , linux-kernel@vger.kernel.org, sohil.mehta@intel.com, Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , Pawan Gupta , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org Subject: Re: [PATCH 1/6] x86/cpu: Break Vendor/Family/Model macros into separate header Message-ID: References: <20260119195047.86E3C696@davehans-spike.ostc.intel.com> <20260119195049.43DDFD4E@davehans-spike.ostc.intel.com> <5e0b2ded-da79-4c86-b9eb-d11106f6ed65@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5e0b2ded-da79-4c86-b9eb-d11106f6ed65@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Tue, Jan 20, 2026 at 07:03:31AM -0800, Dave Hansen wrote: > On 1/20/26 00:24, Andy Shevchenko wrote: > >> +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) > >> +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) > >> +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) > > There are tabs after #define, is it on purpose? > > (yes, I know this is simple move, but if not deliberate, we can tweak > > the tabs/spaces while at it) > > Yes, you can, but I chose not to here. Is there any compelling reason to > tweak it? The usual style to use spaces there. Using tabs makes it mixed and inconsistent. So the expectation of a define is #define$FOO$VALUE -- With Best Regards, Andy Shevchenko