From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2B40C500940 for ; Sat, 10 Jan 2026 13:02:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768050171; cv=none; b=IH/A5eT6pJUyXOVLn1Rce285aJrB1X2JATz8Y6qGO8WeOrUzQD7xHEodyN28cEtils7DfGe555rEp1d2Dlok2Sbq3rYhsA/h2t/T9JeuJr8WYPtU/CrJhrJuOPhSPxhDzQY7G1FQtI5lE/sjZIsGk6Oh5c7MWPxki3BxzDUESlM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768050171; c=relaxed/simple; bh=T7m/VEy0/hSCV/ist9aQYDUTVYzryO8PVyuXjQj8miE=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ld/tHVx05VuiCCDprA1WhpKk8vTOjRUUd7KBdUUf9p4Lv6frBd1C/+XaYRl+F8KxRyOUKOoJAG1BY/Bnv5nNzrUk/FSvpdAbjKW3zH/kZehuK1BCahK19duGL1DBcHyvc5YQOE7AcCB2n9Lt4GPaOECatgslqOY0oFzBgzyWFq0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 669551516; Sat, 10 Jan 2026 05:02:41 -0800 (PST) Received: from arm.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 19F763F6A8; Sat, 10 Jan 2026 05:02:46 -0800 (PST) Date: Sat, 10 Jan 2026 13:02:44 +0000 From: Catalin Marinas To: Taehyun Noh Cc: Will Deacon , Carl Worth , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andreyknvl@gmail.com, pcc@google.com, yeoreum.yun@arm.com Subject: Re: [PATCH 2/2] arm64: mte: Defer disabling of TCO until user_access_begin/end Message-ID: References: <20251030-mte-tighten-tco-v1-2-88c92e7529d9@os.amperecomputing.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Jan 09, 2026 at 11:29:29PM -0600, Taehyun Noh wrote: > On Thu Jan 8, 2026 at 12:45 PM CST, Catalin Marinas wrote: > > Reading the Arm ARM section again, I wonder whether always setting TCMA1 > > does the trick for the Ampere hardware. With KASAN disabled in the > > kernel, all addresses will star with 0xff... so behave as match-all. We > > do this with KASAN_HW_TAGS enabled but it won't have any effect with > > kasan disabled. > > Our team agrees with Catalin’s TCMA1 solution. It disables every kernel > tag checking but the user address will get tag checked as far as TCO is > clear. Also, Carl’s initial testing confirms that > `mem_access_checked*:k` counters drop with the TCMA1 patch. While we > haven’t run the memcached benchmark yet, we will follow up with those > results shortly. That's great. Carl, could you please respin the patch with just setting the TCMA1 bit? Just add a suggested-by me (I could post the patch as well but I don't have the data to back it up and include in the commit log). > Additionally, we’ve observed that Pixel 9 behaves differently; the > kernel does not perform any tag checking when the user process enables > MTE. I’ve tested a simple kernel module that accesses kernel memory on > user ioctl, and measured the MTE perf counters on both AmpereOne and > Pixel 9. Pixel 9 shows no increases in checked access counters, but > AmpereOne shows proportional increases depending on the buffer size that > is accessed inside the kernel module. It's an implementation choice. I think the Arm Ltd CPUs ignore tag checking if SCTLR_EL1.TCF==0, irrespective of TCMA1 or TCO. But always setting TCMA1 is completely harmless and it's covered by the text in the Arm ARM. -- Catalin