From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EE3C47D932 for ; Tue, 20 Jan 2026 20:54:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768942482; cv=none; b=IArgONep3cX/Blokfd2ThN6ZFXsV4PFQuzyEm/fj/rU8BIil21QwfTHspGyPATwPv+wCXBsC6RZ+m9QrJnh+lE9QS8uLdhLEX2OFapC3B4opJ40cE++Ryf4+Bz243fdPQCSRPTwjb6E7sLEYhbZbPZH910KPLeTBPqCBU+Z7yZo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768942482; c=relaxed/simple; bh=TLScfu0rfEhAgJJGxY87LTq6Mn8RDiMa2PwRnob7UJs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Ga3nCxQkzvU32Fk/urxDik8WGdPtga+gxtZoEs5ZxUtULp6GkrFFLiIPiR2ULMu2bHiwhWue9SPE90TdopZUjhkNBSkVVyhmRPNqlWErfbcNkkueQLcudiwIYHY37ibAZYe26eg3u552GiTlMlb9elwAEwUJoL2sxuIRiGzI+5Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ArfO+V8D; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ArfO+V8D" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1768942478; x=1800478478; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=TLScfu0rfEhAgJJGxY87LTq6Mn8RDiMa2PwRnob7UJs=; b=ArfO+V8DH/NkfCFjWNTehxO6g0KAvPDjd1vPqdTAruqG9kPBhpwDC3iv NALgeIMOWYIbhg1QtsFHipI4G/V5ueqYnXRwZPde9hYmzObfqJ2ACpsw4 q1QcpdTXl3/97/+8/TCFKROdX6Tx/m+VEdrCovJbtBdaE2ppeLBGzK3X5 GakmM614KfYmjTYhR+QserqVuKsjOGcBFh3D216pPU6L0yy2upBmnSzOd rGnuA1aaUVNgI3oQNu8jYT0vE8Yi7pjiyS6fyQnomKZMFMLYiEQMJhihy 6BiuwKuGeLxCuTPfz1xNcwQRfQh1/6XDuJ3pJArxV46Bd0PBiDIqjxlb3 Q==; X-CSE-ConnectionGUID: P3lrTBRJSB6Jub9QCAnLMg== X-CSE-MsgGUID: bklR74F5Qx+CK3TcvrBIFQ== X-IronPort-AV: E=McAfee;i="6800,10657,11677"; a="70329683" X-IronPort-AV: E=Sophos;i="6.21,241,1763452800"; d="scan'208";a="70329683" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2026 12:54:37 -0800 X-CSE-ConnectionGUID: hlmqcmBTTdOvdexAvmSgOg== X-CSE-MsgGUID: sDlL5/QLTfeNwSeHU5UoTg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,241,1763452800"; d="scan'208";a="206143789" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2026 12:54:34 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 39E9F95; Tue, 20 Jan 2026 21:54:33 +0100 (CET) Date: Tue, 20 Jan 2026 21:54:33 +0100 From: Andy Shevchenko To: Dave Hansen Cc: Dave Hansen , linux-kernel@vger.kernel.org, sohil.mehta@intel.com, Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , Pawan Gupta , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org Subject: Re: [PATCH 1/6] x86/cpu: Break Vendor/Family/Model macros into separate header Message-ID: References: <20260119195047.86E3C696@davehans-spike.ostc.intel.com> <20260119195049.43DDFD4E@davehans-spike.ostc.intel.com> <5e0b2ded-da79-4c86-b9eb-d11106f6ed65@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Tue, Jan 20, 2026 at 08:34:49AM -0800, Dave Hansen wrote: > On 1/20/26 08:22, Andy Shevchenko wrote: > > On Tue, Jan 20, 2026 at 07:03:31AM -0800, Dave Hansen wrote: > >> On 1/20/26 00:24, Andy Shevchenko wrote: > >>>> +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) > >>>> +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) > >>>> +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) > >>> There are tabs after #define, is it on purpose? > >>> (yes, I know this is simple move, but if not deliberate, we can tweak > >>> the tabs/spaces while at it) > >> Yes, you can, but I chose not to here. Is there any compelling reason to > >> tweak it? > > The usual style to use spaces there. Using tabs makes it mixed and > > inconsistent. So the expectation of a define is > > > > #define$FOO$VALUE > > Remember, this code is being moved, not newly-composed. See what I put in the parentheses, this is exactly what I admit from the beginning. > It's being moved for a bug fix and not being "cleaned up" or massaged > for other purposes. Sure, but it makes no direct visible differences if amended. I don't see why we would bother with an additional patch to fix white spaces. > In a bug fix series, I tend toward changing as few things as possible. > That includes fixing up whitespace. I apply patches all the time that > move code where that code breaks coding-style.rst in _some_way. I'm more > than happy to ignore the checkpatch warnings there. > > I'm also not going to NAK a bug fix that cleans up whitespace. It's > really submitter's preference. _Both_ are fine. > > It's really 100% up to the maintainer that applies it. In this case, the > maintainer obviously has a preference, so why belabor the point? ;) Definitely. -- With Best Regards, Andy Shevchenko