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The display is connected via LPSPI3 interface and uses GPIO pins for reset, busy and DC control. The overlay configures: - LPSPI3 pinmux for SPI communication (MOSI, MISO, CLK, CE0) - PixPaper display device with proper GPIO assignments - SPI frequency set to 5MHz for stable operation " Sorry, My means just replace 3rd paragraph. First 2 paragraph is good. Frank > Enable Open-EP Community pixpaper-213-c support on NXP i.MX93. > > Signed-off-by: Wig Cheng > --- > arch/arm64/boot/dts/freescale/Makefile | 4 ++ > .../freescale/imx93-11x11-frdm-pixpaper.dtso | 51 +++++++++++++++++++ > 2 files changed, 55 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index ce8f937c2315..c2727f8061e2 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -398,6 +398,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb-i3c.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-frdm.dtb > + > +imx93-11x11-frdm-pixpaper-dtbs += imx93-11x11-frdm.dtb imx93-11x11-frdm-pixpaper.dtbo > +dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-frdm-pixpaper.dtb > + > dtb-$(CONFIG_ARCH_MXC) += imx93-14x14-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-kontron-bl-osm-s.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-nash.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso > new file mode 100644 > index 000000000000..1111503b08af > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso > @@ -0,0 +1,51 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Device Tree Overlay for Mayqueen (Open-EP Community) pixpaper display > + * support on NXP FRDM i.MX 93 Development Board > + * > + * Copyright (C) 2026 Wig Cheng > + */ > + > +#include > +#include "imx93-pinfunc.h" > + > +/dts-v1/; > +/plugin/; > + > +&iomuxc { > + pinctrl_lpspi3: lpspi3grp { > + fsl,pins = < > + MX93_PAD_GPIO_IO08__GPIO2_IO08 0x3fe /* SPI3 CE0 */ > + MX93_PAD_GPIO_IO09__LPSPI3_SIN 0x3fe /* SPI3 MISO */ > + MX93_PAD_GPIO_IO10__LPSPI3_SOUT 0x3fe /* SPI3 MOSI */ > + MX93_PAD_GPIO_IO11__LPSPI3_SCK 0x3fe /* SPI3 CLK */ > + >; > + }; > + > + pinctrl_epd_ctrl: epdctrlgrp { > + fsl,pins = < > + MX93_PAD_GPIO_IO05__GPIO2_IO05 0x31e /* DC pin */ > + MX93_PAD_GPIO_IO06__GPIO2_IO06 0x31e /* RESET pin */ > + MX93_PAD_GPIO_IO26__GPIO2_IO26 0x31e /* BUSY pin */ > + >; > + }; > +}; > + > +&lpspi3 { > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpspi3>, <&pinctrl_epd_ctrl>; > + cs-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; > + fsl,spi-num-chipselects = <1>; > + status = "okay"; > + > + display@0 { > + compatible = "mayqueen,pixpaper"; > + reg = <0>; > + spi-max-frequency = <5000000>; > + reset-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; > + dc-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > + busy-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; > + }; > +}; > -- > 2.43.0 >