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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2b7a16cf8f2sm20996442eec.7.2026.02.01.21.21.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Feb 2026 21:21:09 -0800 (PST) Date: Sun, 1 Feb 2026 21:21:08 -0800 From: Qiang Yu To: Konrad Dybcio Cc: Bjorn Andersson , Pankaj Patil , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Jyothi Kumar Seerapu , Maulik Shah , Sibi Sankar , Taniya Das , Kamal Wadhwa , Manaf Meethalavalappu Pallikunhi , Jishnu Prakash , Dmitry Baryshkov , Abel Vesa Subject: Re: [PATCH v6 0/4] arm64: dts: qcom: Introduce Glymur SoC dtsi and Glymur CRD dts Message-ID: References: <20260122-upstream_v3_glymur_introduction-v6-0-245f408ed82a@oss.qualcomm.com> <75lzykd37zdvrks5i2bb4zb2yzjtm25kv3hegmikndkbr772mz@w2ykff3ny45u> <6d2b92d0-55bb-4ce0-ad5e-316210a3d2c5@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <6d2b92d0-55bb-4ce0-ad5e-316210a3d2c5@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: bSb2VhZDDJtbNWjmuvt31v5z5DYdnXh5 X-Proofpoint-GUID: bSb2VhZDDJtbNWjmuvt31v5z5DYdnXh5 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAyMDA0MyBTYWx0ZWRfX812ZykGHDCoK n+kcyVACueO2ptd/0Dq+tLgsi+OPT6qDVtJhLenM1AwGHK43uDL7XXfPvUy1eIuozZVfjBdLgeL OsQ70uqY2xkcwFrkK0TnyWGBf46N5aWeLYKFPuD/iohUNtpkxWBphnzf6eqJBvdyq5R7LuHGOLH qK2MgH53vmZKzsdGrbp7MWcM/pImtL7ypnyIoooAF71dwcmbGwepoCv5xZKYe986tporXt942Cd hMBJ2KMiO5qtPOrdcMWZiO9Hk80ZcWU8xH1AC6Z2vk1Yhi1fVzpJqHvF0UkfMrgshhIeuj0p50K eYULReqVQsrQ4p7lIyTSjvHQ9zR7O1fDJ9Ov6LIYXfJkL4yOhkAyn2yceFhP5zX2fQVvR7nZkzS 5xJVSAId656qk6ngqrv6034cxrBpnRzus7vwen5ZXBjcC2xs3Vcs8dSgkQP+zv9hR9G2slG86Zb dBfsqBbudAeyFDAhpTA== X-Authority-Analysis: v=2.4 cv=bIEb4f+Z c=1 sm=1 tr=0 ts=69803448 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=qC_FGOx9AAAA:8 a=gEfo2CItAAAA:8 a=LtUyV6W0DBWilpilEP8A:9 a=CjuIK1q_8ugA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=fsdK_YakeE02zTmptMdW:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-02_01,2026-01-30_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 malwarescore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 clxscore=1015 suspectscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602020043 On Thu, Jan 29, 2026 at 01:07:08PM +0100, Konrad Dybcio wrote: > On 1/29/26 1:05 PM, Qiang Yu wrote: > > On Wed, Jan 28, 2026 at 07:21:04PM -0600, Bjorn Andersson wrote: > >> On Thu, Jan 22, 2026 at 08:53:57PM +0530, Pankaj Patil wrote: > >>> Introduce dt-bindings and initial device tree support for Glymur, > >>> Qualcomm's next-generation compute SoC and it's associated > >>> Compute Reference Device (CRD) platform. > >>> > >>> https://www.qualcomm.com/products/mobile/snapdragon/laptops-and-tablets/snapdragon-x2-elite > >>> https://www.qualcomm.com/news/releases/2025/09/new-snapdragon-x2-elite-extreme-and-snapdragon-x2-elite-are-the- > >>> > >>> The base support enables booting to shell with rootfs on NVMe, > >>> demonstrating functionality for PCIe and NVMe subsystems. > >>> DCVS is also enabled, allowing dynamic frequency scaling for the CPUs. > >>> TSENS (Thermal Sensors) enabled for monitoring SoC temperature and > >>> thermal management. The platform is capable of booting kernel at EL2 > >>> with kvm-unit tests performed on it for sanity. > >>> > >>> Added dtsi files for the PMIC's enabled PMH0101, PMK8850, PMCX0102, > >>> SMB2370, PMH0104, PMH0110 along with temp-alarm and GPIO nodeS. > >>> > >>> For CPU compatible naming, there is one discussion which is not specific > >>> to Glymur, Kaanapali and Glymur use the same Oryon cores. > >>> https://lore.kernel.org/all/20251119-oryon-binding-v1-1-f79a101b0391@oss.qualcomm.com/ > >>> We've kept the "qcom,oryon" compatible > >>> > >>> Features enabled in this patchset: > >>> 1. NVMe storage support > >>> 2. PCIe controller and PCIe PHY > >>> 3. RPMH Regulators > >>> 4. Clocks and reset controllers - GCC, TCSRCC, DISPCC, RPMHCC > >>> 5. Interrupt controller > >>> 6. TLMM (Top-Level Mode Multiplexer) > >>> 7. QUP Block > >>> 8. Reserved memory regions > >>> 9. PMIC support with regulators > >>> 10. CPU Power Domains > >>> 11. TSENS (Thermal Sensors) > >>> 12. DCVS: CPU DCVS with scmi perf protocol > >>> > >>> Dependencies: > >>> > >>> dt-bindings: > >>> 1. https://lore.kernel.org/all/20260121-glymur-pmic-mfd-v1-1-2aab4f21e79c@oss.qualcomm.com/ > >>> 2. https://lore.kernel.org/all/20251215-knp-pmic-leds-v3-2-5e583f68b0e5@oss.qualcomm.com/ > >>> 3. https://lore.kernel.org/all/20260121110828.2267061-1-pankaj.patil@oss.qualcomm.com/ > >>> 4. https://lore.kernel.org/all/20260111155234.5829-1-pankaj.patil@oss.qualcomm.com/ > >>> > >>> Linux-next based tree with Glymur patches is available at: > >>> https://git.codelinaro.org/clo/linux-kernel/kernel-qcom/-/tree/b4/v6_glymur_introduction > >>> > >> > >> FWIW, I applied these patches onto next-20260128 to see if things has > >> improved since Rob's report and I get: > >> > >> $ make qcom/glymur-crd.dtb CHECK_DTBS=1 > >> DTC [C] arch/arm64/boot/dts/qcom/glymur-crd.dtb > >> qcom/glymur-crd.dtb: dma-controller@800000 (qcom,glymur-gpi-dma): interrupts: [[0, 588, 4], [0, 589, 4], [0, 590, 4], [0, 591, 4], [0, 592, 4], [0, 593, 4], [0, 594, 4], [0, 595, 4], [0, 596, 4], [0, 597, 4], [0, 598, 4], [0, 599, 4], [2, 129, 4], [2, 130, 4], [2, 131, 4], [2, 132, 4]] is too long > >> from schema $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# > >> qcom/glymur-crd.dtb: dma-controller@a00000 (qcom,glymur-gpi-dma): interrupts: [[0, 279, 4], [0, 280, 4], [0, 281, 4], [0, 282, 4], [0, 283, 4], [0, 284, 4], [0, 293, 4], [0, 294, 4], [0, 295, 4], [0, 296, 4], [0, 297, 4], [0, 298, 4], [2, 124, 4], [2, 125, 4], [2, 126, 4], [2, 127, 4]] is too long > >> from schema $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# > >> qcom/glymur-crd.dtb: dma-controller@b00000 (qcom,glymur-gpi-dma): interrupts: [[2, 76, 4], [2, 77, 4], [2, 78, 4], [2, 79, 4], [2, 80, 4], [2, 81, 4], [2, 82, 4], [2, 83, 4], [2, 84, 4], [2, 85, 4], [2, 86, 4], [2, 87, 4], [2, 88, 4], [2, 89, 4], [2, 90, 4], [2, 91, 4]] is too long > >> from schema $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# > >> qcom/glymur-crd.dtb: pmic@1 (qcom,pmh0101): led-controller@ee00:compatible:0: 'qcom,pmh0101-flash-led' is not one of ['qcom,pm6150l-flash-led', 'qcom,pm660l-flash-led', 'qcom,pm7550-flash-led', 'qcom,pm8150c-flash-led', 'qcom,pm8150l-flash-led', 'qcom,pm8350c-flash-led', 'qcom,pm8550-flash-led', 'qcom,pmi8998-flash-led'] > >> from schema $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml# > >> qcom/glymur-crd.dtb: pmic@1 (qcom,pmh0101): pwm:compatible: 'oneOf' conditional failed, one must be fixed: > >> ['qcom,pmh0101-pwm', 'qcom,pm8350c-pwm'] is too long > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm660l-lpg', 'qcom,pm8150b-lpg', 'qcom,pm8150l-lpg', 'qcom,pm8350c-pwm', 'qcom,pm8916-pwm', 'qcom,pm8941-lpg', 'qcom,pm8994-lpg', 'qcom,pmc8180c-lpg', 'qcom,pmi632-lpg', 'qcom,pmi8950-pwm', 'qcom,pmi8994-lpg', 'qcom,pmi8998-lpg', 'qcom,pmk8550-pwm'] > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm6150l-lpg'] > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8550-pwm'] > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8937-pwm'] > >> 'qcom,pm8150l-lpg' was expected > >> 'qcom,pm8916-pwm' was expected > >> from schema $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml# > >> qcom/glymur-crd.dtb: led-controller@ee00 (qcom,pmh0101-flash-led): compatible:0: 'qcom,pmh0101-flash-led' is not one of ['qcom,pm6150l-flash-led', 'qcom,pm660l-flash-led', 'qcom,pm7550-flash-led', 'qcom,pm8150c-flash-led', 'qcom,pm8150l-flash-led', 'qcom,pm8350c-flash-led', 'qcom,pm8550-flash-led', 'qcom,pmi8998-flash-led'] > >> from schema $id: http://devicetree.org/schemas/leds/qcom,spmi-flash-led.yaml# > >> qcom/glymur-crd.dtb: /soc@0/arbiter@c400000/spmi@c426000/pmic@1/led-controller@ee00: failed to match any schema with compatible: ['qcom,pmh0101-flash-led', 'qcom,spmi-flash-led'] > >> qcom/glymur-crd.dtb: pwm (qcom,pmh0101-pwm): compatible: 'oneOf' conditional failed, one must be fixed: > >> ['qcom,pmh0101-pwm', 'qcom,pm8350c-pwm'] is too long > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm660l-lpg', 'qcom,pm8150b-lpg', 'qcom,pm8150l-lpg', 'qcom,pm8350c-pwm', 'qcom,pm8916-pwm', 'qcom,pm8941-lpg', 'qcom,pm8994-lpg', 'qcom,pmc8180c-lpg', 'qcom,pmi632-lpg', 'qcom,pmi8950-pwm', 'qcom,pmi8994-lpg', 'qcom,pmi8998-lpg', 'qcom,pmk8550-pwm'] > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm6150l-lpg'] > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8550-pwm'] > >> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8937-pwm'] > >> 'qcom,pm8150l-lpg' was expected > >> 'qcom,pm8916-pwm' was expected > >> from schema $id: http://devicetree.org/schemas/leds/leds-qcom-lpg.yaml# > >> qcom/glymur-crd.dtb: /soc@0/arbiter@c400000/spmi@c426000/pmic@1/pwm: failed to match any schema with compatible: ['qcom,pmh0101-pwm', 'qcom,pm8350c-pwm'] > >> > >> So, we're still missing a few dependencies. > >> > >> > >> Booting the system I get a ton of errors from PCIe in the kernel log: > >> > >> debugfs: 'opp:5000000' already exists in 'soc@0-1c00000.pci' > >> > >> # dmesg | grep -E 'debugfs: .+ already exists' |wc -l > >> 508 > >> > >> The system does eventually boot, and I was happy to see that we do end > >> up finding the PCIe devices after all. > >> > > I enabled dynamic debug logs and observed that each PCIe platform device > > probe was deferred approximately 10 times. The probe deferrals resulted in > > additional OPP debugfs warnings being printed. > > > > The PCIe platform device probe was deferred because the PHY driver was not > > ready - either because the PHY driver was not yet loaded, or because the > > PHY driver's own probe was also deferred due to its dependency (e.g., > > 1fd5000.clock-controller) not being ready. This is normal behavior, > > correct? I also observed that other driver probes were deferred. > > > > But I'm not sure why there are more than 300 times probe deferrals on > > your setup. > > I think Bjorn is trying to say that the driver is wrong, because it > effectively seems to call devm_pm_opp_of_add_table repeatedly > Okay, to avoid PCIe driver probe deferrals and the resulting increased OPP debugfs warnings caused by these deferrals, we plan to move the PHY properties back from the root port node to the controller device tree node. - Qiang Yu > Konrad