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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-124a9e0304bsm17448885c88.14.2026.02.01.21.04.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Feb 2026 21:04:46 -0800 (PST) Date: Sun, 1 Feb 2026 21:04:44 -0800 From: Qiang Yu To: Pankaj Patil Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kamal Wadhwa , Sibi Sankar , Jyothi Kumar Seerapu , Dmitry Baryshkov , Konrad Dybcio Subject: Re: [PATCH v6 4/4] arm64: dts: qcom: glymur: Enable Glymur CRD board support Message-ID: References: <20260122-upstream_v3_glymur_introduction-v6-0-245f408ed82a@oss.qualcomm.com> <20260122-upstream_v3_glymur_introduction-v6-4-245f408ed82a@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260122-upstream_v3_glymur_introduction-v6-4-245f408ed82a@oss.qualcomm.com> X-Authority-Analysis: v=2.4 cv=LcAxKzfi c=1 sm=1 tr=0 ts=69803070 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=HLvJrb55YJJQxwU-fPkA:9 a=CjuIK1q_8ugA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-ORIG-GUID: UxzehmScBE5apFjcfqbSVRpeooaAFsu- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAyMDA0MSBTYWx0ZWRfX+hRJq2CiJBJb Jg35r7xm8Ym7ltJivkwCu1vIdWQxXzsZtwZIK43eGGMDqTThEJbhaeR2zoxNwpaRbm2yU5gNF5+ TIqFBwxUnXKZ0R/Tn/vjqIgBRZ8LE4Rhyn0tU4r5k/xT96nZsp22ptjvQHt0C89LAC0fZTRs/8J J2+tT0IrNFsUhBp5GgA2RTU/bggP2OYe0jkENdmJQjvMtVDT5ezieHGQP+J4S6eOpAxLlJ1qSRg /rcdjpu7tazFjO4aX8IVUgAxDfwsOGUmNN8g327D86YTTDgZE5NtiXI0/X7Q0lsvUjmp9+isEn5 Ug+QO+Qe4piU8aBiKP9jCTL55UYCNFz2Sjhdb2kJANQ1iBHBnwAoo6mC9HUVeXTes2+QbldmPND QdgHPpe2H0pw7bFVC70SYJD5KLAolWv3qlecxQCRSg1xZF4bl5WakVn8p5V7j5LjN0A8dEeUdzO HLRQdNeL57X7njyFXqg== X-Proofpoint-GUID: UxzehmScBE5apFjcfqbSVRpeooaAFsu- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-02_01,2026-01-30_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602020041 On Thu, Jan 22, 2026 at 08:54:01PM +0530, Pankaj Patil wrote: > Add initial device tree support for the Glymur Compute Reference > Device(CRD) board, with this board dts glymur crd can boot to shell > with rootfs on nvme and uart21 as serial console > > Features enabled are: > - Board and sleep clocks > - Volume up/down keys > - Regulators 0 - 4 > - Power supplies and sideband signals (PERST, WAKE, CLKREQ) for > PCIe3b/4/5/6 controllers and PHYs > > Co-developed-by: Kamal Wadhwa > Signed-off-by: Kamal Wadhwa > Co-developed-by: Qiang Yu > Signed-off-by: Qiang Yu > Co-developed-by: Sibi Sankar > Signed-off-by: Sibi Sankar > Co-developed-by: Jyothi Kumar Seerapu > Signed-off-by: Jyothi Kumar Seerapu > Reviewed-by: Dmitry Baryshkov > Reviewed-by: Konrad Dybcio > Signed-off-by: Pankaj Patil > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > arch/arm64/boot/dts/qcom/glymur-crd.dts | 601 ++++++++++++++++++++++++++++++++ > 2 files changed, 602 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index a5d6f451f85c..c24ade85b73a 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8039-t2.dtb > dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb > dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb > dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb > +dtb-$(CONFIG_ARCH_QCOM) += glymur-crd.dtb > dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb > diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts > new file mode 100644 > index 000000000000..0899214465ac > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts > @@ -0,0 +1,601 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +/dts-v1/; > + > +#include "glymur.dtsi" > +#include "pmcx0102.dtsi" /* SPMI0: SID-2/3 SPMI1: SID-2/3 */ > +#include "pmh0101.dtsi" /* SPMI0: SID-1 */ > +#include "pmh0110-glymur.dtsi" /* SPMI0: SID-5/7 SPMI1: SID-5 */ > +#include "pmh0104-glymur.dtsi" /* SPMI0: SID-8/9 SPMI1: SID-11 */ > +#include "pmk8850.dtsi" /* SPMI0: SID-0 */ > +#include "smb2370.dtsi" /* SPMI2: SID-9/10/11 */ > + > +/ { > + model = "Qualcomm Technologies, Inc. Glymur CRD"; > + compatible = "qcom,glymur-crd", "qcom,glymur"; > + > + aliases { > + serial0 = &uart21; > + serial1 = &uart14; > + i2c0 = &i2c0; > + i2c1 = &i2c4; > + i2c2 = &i2c5; > + spi0 = &spi18; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + clocks { > + xo_board: xo-board { > + compatible = "fixed-clock"; > + clock-frequency = <38400000>; > + #clock-cells = <0>; > + }; > + > + sleep_clk: sleep-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000>; > + #clock-cells = <0>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + pinctrl-0 = <&key_vol_up_default>; > + pinctrl-names = "default"; > + > + key-volume-up { > + label = "Volume Up"; > + linux,code = ; > + gpios = <&pmh0101_gpios 6 GPIO_ACTIVE_LOW>; > + debounce-interval = <15>; > + linux,can-disable; > + wakeup-source; > + }; > + }; > + > + vreg_nvme: regulator-nvme { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_NVME_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&pmh0101_gpios 14 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&nvme_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_nvmesec: regulator-nvmesec { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_NVME_SEC_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&pmh0110_f_e1_gpios 14 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&nvme_sec_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_wlan: regulator-wlan { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_WLAN_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&tlmm 94 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&wlan_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_wwan: regulator-wwan { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_WWAN_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&tlmm 246 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&wwan_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; Please remove regulator-boot-on, I see SDX75 crash with this property. - Qiang Yu > + }; > +}; > + > +&apps_rsc { > + regulators-0 { > + compatible = "qcom,pmh0101-rpmh-regulators"; > + qcom,pmic-id = "B_E0"; > + > + vreg_bob1_e0: bob1 { > + regulator-name = "vreg_bob1_e0"; > + regulator-min-microvolt = <2200000>; > + regulator-max-microvolt = <4224000>; > + regulator-initial-mode = ; > + }; > + > + vreg_bob2_e0: bob2 { > + regulator-name = "vreg_bob2_e0"; > + regulator-min-microvolt = <2540000>; > + regulator-max-microvolt = <3600000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l1b_e0_1p8: ldo1 { > + regulator-name = "vreg_l1b_e0_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l2b_e0_2p9: ldo2 { > + regulator-name = "vreg_l2b_e0_2p9"; > + regulator-min-microvolt = <2904000>; > + regulator-max-microvolt = <2904000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l7b_e0_2p79: ldo7 { > + regulator-name = "vreg_l7b_e0_2p79"; > + regulator-min-microvolt = <2790000>; > + regulator-max-microvolt = <2792000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l8b_e0_1p50: ldo8 { > + regulator-name = "vreg_l8b_e0_1p50"; > + regulator-min-microvolt = <1504000>; > + regulator-max-microvolt = <1504000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l9b_e0_2p7: ldo9 { > + regulator-name = "vreg_l9b_e0_2p7"; > + regulator-min-microvolt = <2704000>; > + regulator-max-microvolt = <2704000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l10b_e0_1p8: ldo10 { > + regulator-name = "vreg_l10b_e0_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l11b_e0_1p2: ldo11 { > + regulator-name = "vreg_l11b_e0_1p2"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l12b_e0_1p14: ldo12 { > + regulator-name = "vreg_l12b_e0_1p14"; > + regulator-min-microvolt = <1144000>; > + regulator-max-microvolt = <1144000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l15b_e0_1p8: ldo15 { > + regulator-name = "vreg_l15b_e0_1p8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l17b_e0_2p4: ldo17 { > + regulator-name = "vreg_l17b_e0_2p4"; > + regulator-min-microvolt = <2400000>; > + regulator-max-microvolt = <2700000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l18b_e0_1p2: ldo18 { > + regulator-name = "vreg_l18b_e0_1p2"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = ; > + }; > + }; > + > + regulators-1 { > + compatible = "qcom,pmcx0102-rpmh-regulators"; > + qcom,pmic-id = "C_E1"; > + > + vreg_l1c_e1_0p82: ldo1 { > + regulator-name = "vreg_l1c_e1_0p82"; > + regulator-min-microvolt = <832000>; > + regulator-max-microvolt = <832000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l2c_e1_1p14: ldo2 { > + regulator-name = "vreg_l2c_e1_1p14"; > + regulator-min-microvolt = <1144000>; > + regulator-max-microvolt = <1144000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l3c_e1_0p89: ldo3 { > + regulator-name = "vreg_l3c_e1_0p89"; > + regulator-min-microvolt = <890000>; > + regulator-max-microvolt = <980000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l4c_e1_0p72: ldo4 { > + regulator-name = "vreg_l4c_e1_0p72"; > + regulator-min-microvolt = <720000>; > + regulator-max-microvolt = <720000>; > + regulator-initial-mode = ; > + }; > + }; > + > + regulators-2 { > + compatible = "qcom,pmh0110-rpmh-regulators"; > + qcom,pmic-id = "F_E0"; > + > + vreg_s7f_e0_1p32: smps7 { > + regulator-name = "vreg_s7f_e0_1p32"; > + regulator-min-microvolt = <1320000>; > + regulator-max-microvolt = <1352000>; > + regulator-initial-mode = ; > + }; > + > + vreg_s8f_e0_0p95: smps8 { > + regulator-name = "vreg_s8f_e0_0p95"; > + regulator-min-microvolt = <952000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = ; > + }; > + > + vreg_s9f_e0_1p9: smps9 { > + regulator-name = "vreg_s9f_e0_1p9"; > + regulator-min-microvolt = <1900000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l2f_e0_0p82: ldo2 { > + regulator-name = "vreg_l2f_e0_0p82"; > + regulator-min-microvolt = <832000>; > + regulator-max-microvolt = <832000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l3f_e0_0p72: ldo3 { > + regulator-name = "vreg_l3f_e0_0p72"; > + regulator-min-microvolt = <720000>; > + regulator-max-microvolt = <720000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l4f_e0_0p3: ldo4 { > + regulator-name = "vreg_l4f_e0_0p3"; > + regulator-min-microvolt = <1080000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = ; > + }; > + }; > + > + regulators-3 { > + compatible = "qcom,pmh0110-rpmh-regulators"; > + qcom,pmic-id = "F_E1"; > + > + vreg_s7f_e1_0p3: smps7 { > + regulator-name = "vreg_s7f_e1_0p3"; > + regulator-min-microvolt = <300000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l1f_e1_0p82: ldo1 { > + regulator-name = "vreg_l1f_e1_0p82"; > + regulator-min-microvolt = <832000>; > + regulator-max-microvolt = <832000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l2f_e1_0p83: ldo2 { > + regulator-name = "vreg_l2f_e1_0p83"; > + regulator-min-microvolt = <832000>; > + regulator-max-microvolt = <832000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l4f_e1_1p08: ldo4 { > + regulator-name = "vreg_l4f_e1_1p08"; > + regulator-min-microvolt = <1080000>; > + regulator-max-microvolt = <1320000>; > + regulator-initial-mode = ; > + }; > + }; > + > + regulators-4 { > + compatible = "qcom,pmh0110-rpmh-regulators"; > + qcom,pmic-id = "H_E0"; > + > + vreg_l1h_e0_0p89: ldo1 { > + regulator-name = "vreg_l1h_e0_0p89"; > + regulator-min-microvolt = <832000>; > + regulator-max-microvolt = <832000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l2h_e0_0p72: ldo2 { > + regulator-name = "vreg_l2h_e0_0p72"; > + regulator-min-microvolt = <832000>; > + regulator-max-microvolt = <832000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l3h_e0_0p32: ldo3 { > + regulator-name = "vreg_l3h_e0_0p32"; > + regulator-min-microvolt = <320000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l4h_e0_1p2: ldo4 { > + regulator-name = "vreg_l4h_e0_1p2"; > + regulator-min-microvolt = <1080000>; > + regulator-max-microvolt = <1320000>; > + regulator-initial-mode = ; > + }; > + }; > +}; > + > +&pcie3b { > + vddpe-3v3-supply = <&vreg_nvmesec>; > + > + pinctrl-0 = <&pcie3b_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > +}; > + > +&pcie3b_phy { > + vdda-phy-supply = <&vreg_l3c_e1_0p89>; > + vdda-pll-supply = <&vreg_l2c_e1_1p14>; > + > + status = "okay"; > +}; > + > +&pcie3b_port0 { > + reset-gpios = <&tlmm 155 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 157 GPIO_ACTIVE_LOW>; > +}; > + > +&pcie4 { > + vddpe-3v3-supply = <&vreg_wlan>; > + > + pinctrl-0 = <&pcie4_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > +}; > + > +&pcie4_phy { > + vdda-phy-supply = <&vreg_l1c_e1_0p82>; > + vdda-pll-supply = <&vreg_l4f_e1_1p08>; > + > + status = "okay"; > +}; > + > +&pcie4_port0 { > + reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; > +}; > + > +&pcie5 { > + vddpe-3v3-supply = <&vreg_nvme>; > + > + pinctrl-0 = <&pcie5_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > +}; > + > +&pcie5_phy { > + vdda-phy-supply = <&vreg_l2f_e0_0p82>; > + vdda-pll-supply = <&vreg_l4h_e0_1p2>; > + > + status = "okay"; > +}; > + > +&pcie5_port0 { > + reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; > +}; > + > +&pcie6 { > + vddpe-3v3-supply = <&vreg_wwan>; > + > + pinctrl-0 = <&pcie6_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > +}; > + > +&pcie6_phy { > + vdda-phy-supply = <&vreg_l1c_e1_0p82>; > + vdda-pll-supply = <&vreg_l4f_e1_1p08>; > + > + status = "okay"; > +}; > + > +&pcie6_port0 { > + reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; > +}; > + > +&pmh0101_gpios { > + nvme_reg_en: nvme-reg-en-state { > + pins = "gpio14"; > + function = "normal"; > + bias-disable; > + }; > +}; > + > +&pmh0110_f_e1_gpios { > + nvme_sec_reg_en: nvme-reg-en-state { > + pins = "gpio14"; > + function = "normal"; > + bias-disable; > + }; > +}; > + > +&pmh0101_gpios { > + key_vol_up_default: key-vol-up-default-state { > + pins = "gpio6"; > + function = "normal"; > + output-disable; > + bias-pull-up; > + }; > +}; > + > +&pmk8850_rtc { > + qcom,no-alarm; > +}; > + > +&pon_resin { > + linux,code = ; > + status = "okay"; > +}; > + > +&tlmm { > + gpio-reserved-ranges = <4 4>, /* EC TZ Secure I3C */ > + <10 2>, /* OOB UART */ > + <44 4>; /* Security SPI (TPM) */ > + > + pcie4_default: pcie4-default-state { > + clkreq-n-pins { > + pins = "gpio147"; > + function = "pcie4_clk_req_n"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio146"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + wake-n-pins { > + pins = "gpio148"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + }; > + > + pcie5_default: pcie5-default-state { > + clkreq-n-pins { > + pins = "gpio153"; > + function = "pcie5_clk_req_n"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio152"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + wake-n-pins { > + pins = "gpio154"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + }; > + > + pcie6_default: pcie6-default-state { > + clkreq-n-pins { > + pins = "gpio150"; > + function = "pcie6_clk_req_n"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio149"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + wake-n-pins { > + pins = "gpio151"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + }; > + > + pcie3b_default: pcie3b-default-state { > + clkreq-n-pins { > + pins = "gpio156"; > + function = "pcie3b_clk"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio155"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + wake-n-pins { > + pins = "gpio157"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + }; > + > + wlan_reg_en: wlan-reg-en-state { > + pins = "gpio94"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + wwan_reg_en: wwan-reg-en-state { > + pins = "gpio246"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > +}; > + > > -- > 2.34.1 >