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Wed, 18 Feb 2026 17:28:27 -0800 (PST) Date: Wed, 18 Feb 2026 17:28:26 -0800 From: Deepak Gupta To: Mark Brown Cc: "Edgecombe, Rick P" , "torvalds@linux-foundation.org" , "Yu, Yu-cheng" , "linux-riscv@lists.infradead.org" , "peterz@infradead.org" , "pjw@kernel.org" , "linux-kernel@vger.kernel.org" , "tglx@linutronix.de" , "zong.li@sifive.com" Subject: Re: [GIT PULL] RISC-V updates for v7.0 Message-ID: References: <2248971d-d69c-65fb-93b4-10f0d7d8bbad@kernel.org> <196537b2933567d1781901f813a72ffffedd10fd.camel@intel.com> <7db68a59-3259-40df-ae9a-09ebccec16df@sirena.org.uk> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <7db68a59-3259-40df-ae9a-09ebccec16df@sirena.org.uk> On Thu, Feb 19, 2026 at 12:01:10AM +0000, Mark Brown wrote: >On Wed, Feb 18, 2026 at 09:58:41PM +0000, Edgecombe, Rick P wrote: >> On Wed, 2026-02-18 at 11:57 -0800, Deepak Gupta wrote: > >> > If we land arch-agnostic prctl for enabling branch tracking for userspace as >> > part of risc-v patches, I am hoping we can leverage that for x86 "branch >> > tracking enabling" as well. I don't know if "BTI" is enabled for userspace in >> > the arm64 world but if it isn't then it can use the same prctl. This creates >> > symmetry and convergence as well between major 3 arches for branch tracking >> > support. > >BTI has been available to userspace for quite a while now. Noted. > >> Arm already uses PROT_BTI to enable their landing pad like thing. It doesn't >> need a prctl AFAIU. Peterz had been suggesting we do a similar PROT for x86 user >> IBT. Although an additional prctl might still be required for x86. We'd have to >> actually start taking the patches upstream to see. > >Yeah, for arm64 BTI the control is all per page rather than per thread >or process. Unless I'm forgetting something there's just not a global >control for this in the hardware, it's all keyed off the page tables. Aah this makes sense. This is different from x86 and risc-v. Since BTI is on per-code page basis, kernel enables if loader (interpreter for executable) and then likely loader sets PROT_BTI for rest of the user space dependencies.