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Thu, 19 Feb 2026 23:37:55 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3589d81eb8fsm2285630a91.8.2026.02.19.23.37.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Feb 2026 23:37:55 -0800 (PST) Date: Fri, 20 Feb 2026 13:07:48 +0530 From: Abhinaba Rakshit To: Konrad Dybcio Cc: Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: Re: [PATCH v6 2/4] soc: qcom: ice: Add OPP-based clock scaling support for ICE Message-ID: References: <20260219-enable-ufs-ice-clock-scaling-v6-0-0c5245117d45@oss.qualcomm.com> <20260219-enable-ufs-ice-clock-scaling-v6-2-0c5245117d45@oss.qualcomm.com> <15495f8a-37b0-4768-9ee1-05fd6c70034e@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <15495f8a-37b0-4768-9ee1-05fd6c70034e@oss.qualcomm.com> X-Authority-Analysis: v=2.4 cv=Raedyltv c=1 sm=1 tr=0 ts=69980f55 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=3jkGTw76aC5nUHUS4j8A:9 a=CjuIK1q_8ugA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIwMDA2NSBTYWx0ZWRfXwmujXcRG+92B WUoB2I9wNCdGQ91VWjKGoEKEGn0SufHmkTVxHtiED4Cn9dyZt3xGPdxN7Im0Qn8XoCOUQMJ7XBo kY39u/xWykBRG2tHhtMvHRM5DOvCJQC6m4+lzew/VpdOm2luv53kJNpgSqAKSqQ9YUR49lkSsvf yr9tZCzlD3kfEyM4hJ6tlOxGOC9ttSoI2UNcQ2OV9liDl8ZX1EtMq/UOGITApeG/BB+eYE3nM52 7Vxbg41a/FZrGhguSFk9GwXkOcczUezM/t0LLlcsHT6BU7nHQjY0WK6IjVghVFFGIZQCJpELmdh 3lFyCo8rn7PJkMz4oj34AjaP5slnKlmJZXONpm4XiEYl6ir+H4Vr6boicqn8YNRToe24mrrp9Jc 7PyEEfA5FV6Lu5OcY+RaIxTSHLjZwxK/iuLMlcL4dhD9OtJBzW4mE8/GjG+t52U4RvWh2ih5LPL jQ7YKstBdCuIUWAf+Yg== X-Proofpoint-GUID: yVochN93LQrunTIVXNGR7yifoYgALYWy X-Proofpoint-ORIG-GUID: yVochN93LQrunTIVXNGR7yifoYgALYWy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-19_06,2026-02-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 spamscore=0 phishscore=0 bulkscore=0 clxscore=1015 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602200065 On Thu, Feb 19, 2026 at 03:16:33PM +0100, Konrad Dybcio wrote: > On 2/19/26 10:39 AM, Abhinaba Rakshit wrote: > > Register optional operation-points-v2 table for ICE device > > during device probe. > > > > Introduce clock scaling API qcom_ice_scale_clk which scale ICE > > core clock based on the target frequency provided and if a valid > > OPP-table is registered. Use flags (if provided) to decide on > > the rounding of the clock freq against OPP-table. Disable clock > > scaling if OPP-table is not registered. > > > > When an ICE-device specific OPP table is available, use the PM OPP > > framework to manage frequency scaling and maintain proper power-domain > > constraints. > > > > Also, ensure to drop the votes in suspend to prevent power/thermal > > retention. Subsequently restore the frequency in resume from > > core_clk_freq which stores the last ICE core clock operating frequency. > > > > Signed-off-by: Abhinaba Rakshit > > --- > > [...] > > > +int qcom_ice_scale_clk(struct qcom_ice *ice, unsigned long target_freq, > > + unsigned int flags) > > If you're not going to add more flags, 'bool round_ceil' would do just fine, > without introducing new custom defines I guess, the defines I am currently using are mutually exclusive and not intend to extend it. Hence, can replace using 'bool round_ceil'. Ack, will send a new patchset with the update. > [...] > > > + /* > > + * Register the OPP table only when ICE is described as a standalone > > + * device node. Older platforms place ICE inside the storage controller > > + * node, so they don't need an OPP table here, as they are handled in > > + * storage controller. > > + */ > > + if (!is_legacy_binding) { > > + /* OPP table is optional */ > > + err = devm_pm_opp_of_add_table(dev); > > + if (err && err != -ENODEV) { > > + dev_err(dev, "Invalid OPP table in Device tree\n"); > > + return ERR_PTR(err); > > + } > > + engine->has_opp = (err == 0); > > + > > + if (!engine->has_opp) > > + dev_info(dev, "ICE OPP table is not registered\n"); > > dev_warn(dev, "ICE OPP table is not registered, please update your DT") Ack, will send a new patchset with the update. Abhinaba Rakshit