From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CBF833F8220 for ; Thu, 16 Jul 2026 09:34:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784194460; cv=none; b=jJD4iBqa9dZKn90aJ4FRtZ2GN4HZrvFmyBkY5MS0gRFeAfYGAvmXuy4H399Q2oTi1wr0e1jKQBGPS5fIASmhRna9X3sLCEFhajcSwZ16jFeCHS3jhsK78OOGVgwn7WUknB1N58kCkyvSRtkc2EN+3CAgzQEKw9SxS5n6JviqhRE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784194460; c=relaxed/simple; bh=L3G9pEGnDef+XM1NJskG1lgqT4AANyJCxj8DHi3YY0o=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=IXR8R2URVVMORQaT8t7Y7beqoX0mCCVk5jJepT3y82BNSo1uQwp3lX4ccwagCW3PfBMemYuQeqfeix9tgPLmvvdc4LT9QQM8sUNXZofRdsITh2WM54qhW/w0XxdgrJLzbmOAz20jwC28MwNq4dHQg+cMpmIAit4CFaj5TanLht8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=kkA3xNDl; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="kkA3xNDl" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 919301477; Thu, 16 Jul 2026 02:34:11 -0700 (PDT) Received: from [10.2.212.8] (e134344.arm.com [10.2.212.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AC28A3F905; Thu, 16 Jul 2026 02:34:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1784194455; bh=L3G9pEGnDef+XM1NJskG1lgqT4AANyJCxj8DHi3YY0o=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=kkA3xNDlwVXFsQq1qzebhPlVPNp9oIdaYNTkwk326RvWEWhzgNNm/7CkwJxJTfoQC 2dVJWo3Y3rM6vBWv/avgrblw7yi7ZcvLZhA7RPGZeIXcY2vPUAw0rTRYx0wPCEgJ3d 4gZq7Wisequ+me/e+HKyMfron/ua0UIRIkX6AIUo= Message-ID: Date: Thu, 16 Jul 2026 10:34:13 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Thunderbird Daily Subject: Re: [PATCH v1 05/11] arm_mpam: Ensure MBWU counters are reset on restore To: "Shaopeng Tan (Fujitsu)" Cc: "james.morse@arm.com" , "reinette.chatre@intel.com" , "fenghuay@nvidia.com" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "dave.martin@arm.com" , "andre.przywara@arm.com" References: <20260710115546.29644-6-ben.horgan@arm.com> <0e4246f2-bcfc-4b08-9361-e87872c23672@arm.com> Content-Language: en-US From: Ben Horgan In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Shaopeng, On 7/16/26 01:26, Shaopeng Tan (Fujitsu) wrote: > Hello Ben, > >>>> When an MSC becomes inaccessible due to cpu offline CFG_MBWU_CTL is set to >>>> zero in mpam_save_mbwu_state(). This is very likely to mean that the config >>>> will mismatch when restoring and so the monitor will be reset. However, the >>>> state may have been lost and so there are no guarantees. Ensure the reset >>>> happens by setting the reset_on_next_read and remove the unnecessary writes >>> >from mpam_save_mbwu_state(). >>>> >>>> Fixes: 41e8a14950e1 ("arm_mpam: Track bandwidth counter state for power management") >>>> Signed-off-by: Ben Horgan >>>> --- >>>> drivers/resctrl/mpam_devices.c | 13 +++++++------ >>>> 1 file changed, 7 insertions(+), 6 deletions(-) >>>> >>>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c >>>> index b34e2a368516..222fc248067e 100644 >>>> --- a/drivers/resctrl/mpam_devices.c >>>> +++ b/drivers/resctrl/mpam_devices.c >>>> @@ -1648,10 +1648,13 @@ static int mpam_restore_mbwu_state(void *_ris) >>>> u64 val; >>>> struct mon_read mwbu_arg; >>>> struct mpam_msc_ris *ris = _ris; >>>> + struct msmon_mbwu_state *mbwu_state; >>>> struct mpam_msc *msc = ris->vmsc->msc; >>>> struct mpam_class *class = ris->vmsc->comp->class; >>>> >>>> for (i = 0; i < ris->props.num_mbwu_mon; i++) { >>>> + mbwu_state = &ris->mbwu_state[i]; >>>> + >>>> if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc))) >>>> return -EIO; >>>> >>>> @@ -1661,6 +1664,8 @@ static int mpam_restore_mbwu_state(void *_ris) >>>> mwbu_arg.type = mpam_msmon_choose_counter(class); >>>> mwbu_arg.val = &val; >>>> >>>> + mbwu_state->reset_on_next_read = true; >>>> + >>>> mpam_mon_sel_unlock(msc); >>> >>> for (i = 0; i < ris->props.num_mbwu_mon; i++) { >>> + mbwu_state = &ris->mbwu_state[i]; >>> + >>> if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc))) >>> return -EIO; >>> >>> - if (ris->mbwu_state[i].enabled) { >>> + if (mbwu_state->enabled) { //this line might need refactoring >> >> I'm unclear on what you are trying to point out in this email. Please can you explain. >> >> Thanks, >> >> Ben > > Inside the for loop, you introduced `mbwu_state = &ris->mbwu_state[i];` a few lines earlier, > and then used `mbwu_state->reset_on_next_read = true;` shortly after. > Therefore, using mbwu_state->enabled and mbwu_state->cfg keeps > the whole block consistent and avoids repeating ris->mbwu_state[i] multiple times. Thanks for explaining. Indeed, continuing to use the ris->mbwu_state[i] once it's assigned to a local variable does make this a bit messy. Ben > > Best regards, > Shaopeng TAN > >>> mwbu_arg.ris = ris; >>> - mwbu_arg.ctx = &ris->mbwu_state[i].cfg; >>> + mwbu_arg.ctx = &mbwu_state->cfg; //and this line >>> mwbu_arg.type = mpam_msmon_choose_counter(class); >>> mwbu_arg.val = &val; >>> >>> + mbwu_state->reset_on_next_read = true; >>> + >>> mpam_mon_sel_unlock(msc); >>> >>> >>> Best regards, >>> Shaopeng TAN >>> >>>> __ris_msmon_read(&mwbu_arg); >>>> @@ -1696,15 +1701,11 @@ static int mpam_save_mbwu_state(void *arg) >>>> >>>> cur_flt = mpam_read_monsel_reg(msc, CFG_MBWU_FLT); >>>> cur_ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL); >>>> - mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0); >>>> >>>> - if (mpam_ris_has_mbwu_long_counter(ris)) { >>>> + if (mpam_ris_has_mbwu_long_counter(ris)) >>>> val = mpam_msc_read_mbwu_l(msc); >>>> - mpam_msc_zero_mbwu_l(msc); >>>> - } else { >>>> + else >>>> val = mpam_read_monsel_reg(msc, MBWU); >>>> - mpam_write_monsel_reg(msc, MBWU, 0); >>>> - } >>>> >>>> cfg->mon = i; >>>> cfg->pmg = FIELD_GET(MSMON_CFG_x_FLT_PMG, cur_flt); >>>> -- >>>> 2.43.0 >> >>