From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932818AbeDXI3y (ORCPT ); Tue, 24 Apr 2018 04:29:54 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:44924 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756101AbeDXI3v (ORCPT ); Tue, 24 Apr 2018 04:29:51 -0400 Subject: Re: [PATCH v5 12/44] clk: davinci: Add platform information for TI DA850 PSC To: David Lechner , Stephen Boyd , Bartosz Golaszewski CC: Michael Turquette , linux-clk , devicetree , Linux ARM , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Adam Ford , Linux Kernel Mailing List References: <1515377863-20358-1-git-send-email-david@lechnology.com> <1515377863-20358-13-git-send-email-david@lechnology.com> <69bc0848-0698-b936-96a3-2257a5e27809@ti.com> <57f2182e-09b4-2cab-5602-9d0e029495be@ti.com> <152303318048.143116.2883441215887455211@swboyd.mtv.corp.google.com> <48c8531f-8cd9-a9f8-9c38-cbc4c921c4c9@lechnology.com> From: Sekhar Nori Message-ID: Date: Tue, 24 Apr 2018 13:58:33 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <48c8531f-8cd9-a9f8-9c38-cbc4c921c4c9@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 23 April 2018 08:29 PM, David Lechner wrote: > On 04/06/2018 11:46 AM, Stephen Boyd wrote: >> Quoting Sekhar Nori (2018-04-06 02:37:03) >>> >>> Can you please check that and confirm there is no issue with genpd and >>> using CLK_OF_DECLARE() to initialize clocks? >>> >>> Unless you report an issue back, or Mike and Stephen have ideas about >>> how to handle the dependency between PSC/PLL derived timer clock >>> initialization and and timer_probe(), I think we need to move back to >>> using CLK_OF_DECLARE(). >> >> In such a case, please use the hybrid approach where the clks required >> for the clockevent and/or clocksource are registered in the early >> CLK_OF_DECLARE path but the rest of the clks get registered with a >> proper platform device and driver. There are examples of this approach >> on other platforms already. >> > > I looked at this a bit last week, but I didn't come up with any approach > that I was happy with. It seems like it would be nice to just register > the absolute minimum clocks needed. On DA8XX, that would just be the PLL0 > AUXCLK. On most of the other SoCs, it would be the PLL AUXCLK plus one > LPSC clock. The AUXCLKs are easy because they are just a simple gate > from the oscillator. The LPSC clocks are a bit more tricky because they > have a complex sequence for turning on. Furthermore, on DM646X, we need > the whole PLL up to SYSCLK3 plus one LPSC clock, so things get a bit > messy there. Things might change in the context of work being done here by Bartosz for converting clocks to early platform devices. But, keeping that development aside for a moment: I think this means the PLLs and PSCs need to be CLK_OF_DECLARE(). What we can have as platform devices are clocks that are not in the path to get timer clock working (like CFGCHIP clocks). Thanks, Sekhar