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Mon, 02 Mar 2026 06:37:30 -0800 (PST) Received: from hu-mchunara-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3598ef9177dsm2870948a91.12.2026.03.02.06.37.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Mar 2026 06:37:29 -0800 (PST) Date: Mon, 2 Mar 2026 20:07:23 +0530 From: Monish Chunara To: Dmitry Baryshkov Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mani@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sarthak.garg@oss.qualcomm.com, pradeep.pragallapati@oss.qualcomm.com, nitin.rawat@oss.qualcomm.com Subject: Re: [PATCH 0/3] arm64: dts: qcom: monaco: Enable SDHCI storage support Message-ID: References: <20260227105055.2364348-1-monish.chunara@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-ORIG-GUID: BXaJmecv6j9OkX2U0YEPK2Qdj8Lmo9Fd X-Proofpoint-GUID: BXaJmecv6j9OkX2U0YEPK2Qdj8Lmo9Fd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzAyMDEyMiBTYWx0ZWRfX2vUcpEqTU6tV ptcYa/y2Iq4eQeVbPfDBa7eEG2dyoFUiYLuHM44QkBggSQswON6ImaOkfWLHdt3pSOxgQKH3ErL 3YFRgfLNFtdstnJ/XJXKy/VuG6D0APgx8XnK3KJIkFLs6tMAwcyaoJK2EQ7Q/F0Mj/5KVUMDdkQ zQrkbX+XH9FHWpBo+3D5rWKrVnZ344frH03gd7uM3zD76wLjhtR/dt0VhSBSYuReYK89EQMfrH/ AAos6uXDrOzTElC5VWmGX4cMly46wOYGdTREDrF6RHGatxObDKF2OqQaV91ubgAVWOL6b62l4Ad y6IvwcDE13l045TmVudZWvol+FPUz9+H7s/ecBZkFU6raNGf6Wg93zpiXc85Xvo0GZlneZETwG1 hCaiFx9qfzqxeWZCbQ5/RrV06uwRtVPm2IuuClqbnPbdsBCbv6qpwwulwK4x0/Az8gVP3BslPH7 F2Qtmt4JCl9G8bTU6jA== X-Authority-Analysis: v=2.4 cv=cLntc1eN c=1 sm=1 tr=0 ts=69a5a0ac cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=U2YZr0DjLyW8uJ9i07MA:9 a=CjuIK1q_8ugA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-02_03,2026-03-02_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 phishscore=0 spamscore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603020122 On Fri, Feb 27, 2026 at 10:05:32PM +0200, Dmitry Baryshkov wrote: > On Fri, Feb 27, 2026 at 04:20:52PM +0530, Monish Chunara wrote: > > This series enables SDHCI storage support for both SD Card and eMMC on the > > Qualcomm Monaco EVK platform. > > > > The Monaco SoC shares the SDHCI controller between SD Card and eMMC use > > cases. Previously, the common SoC dtsi unconditionally enabled the > > 'supports-cqe' property. This causes regression for SD cards, resulting > > in timeouts and initialization failures during the probe sequence, as > > the driver attempts to enable Command Queueing (CQE) logic incompatible > > with the SD protocol. > > > > To resolve this and enable full storage support, this series: > > > > 1. Moves the 'supports-cqe' property out of the common SoC dtsi. It is > > now only enabled in the specific eMMC configuration where it is > > supported. > > 2. Adds a device tree overlay to enable SD Card support (SDR/DDR modes). > > 3. Adds a device tree overlay to enable eMMC support. This configuration > > also explicitly disables the UFS controller to prevent power leakage, > > as the VCC regulator is shared between the UFS and eMMC rails on this > > platform. > > > > Validated on Qualcomm Monaco EVK with both SD Card and eMMC modules. > > > > Monish Chunara (3): > > arm64: dts: qcom: monaco: Move eMMC CQE support from SoC to board DT > > arm64: dts: qcom: monaco-evk: Enable SDHCI for SD Card via overlay > > arm64: dts: qcom: monaco-evk: Add SDHCI support for eMMC via overlay > > You are adding two overlays. But what does it mean? Does EVK has no uSD > / eMMC at all, having both attachable via some kind of mezzanine? Is one > of them attachable? Or are both cases present onboard with the correct > one being selected by the DIP switch? > The monaco EVK has both storage devices present onboard and the desired one is selected via a DIP switch. The overlay selection logic would be based on a fitImage metadata entry that gets populated at UEFI level by determining the currently selected storage device (eMMC/SD) on the device. Hence, this approach becomes robust to enable the user for using either of the two mediums, without any additional requirement of reflashing any images. Regards, Monish