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From: Jonathan Marek <jonathan@marek.ca>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
	Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	Marijn Suijten <marijn.suijten@somainline.org>,
	freedreno@lists.freedesktop.org
Subject: Re: [Freedreno] [PATCH 5/6] drm/msm/a6xx: Use GMU_ALWAYS_ON_COUNTER for GMU-equipped GPUs in timestamp
Date: Wed, 17 May 2023 14:09:26 -0400	[thread overview]
Message-ID: <aaab25be-3403-518d-e639-c80b0930906a@marek.ca> (raw)
In-Reply-To: <20230517-topic-a7xx_prep-v1-5-7a964f2e99c2@linaro.org>

AFAIK GMU_ALWAYS_ON_COUNTER does not have the same value as 
CP_ALWAYS_ON_COUNTER (only the same frequency), so changing this would 
break userspace expecting to be able to compare the value returned by 
MSM_PARAM_TIMESTAMP with CP timestamp values.

On 5/17/23 12:50 PM, Konrad Dybcio wrote:
> Use the always-on counter provided by the GMU to skip having to
> keep the GPU online.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>   drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index 8707e8b6ac7e..d2a999b90589 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
>   
>   	mutex_lock(&a6xx_gpu->gmu.lock);
>   
> -	/* Force the GPU power on so we can read this register */
> -	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);
> -
> -	*value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER);
> -
> -	a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);
> +	*value = gmu_read64(&a6xx_gpu->gmu,
> +			    REG_A6XX_GMU_ALWAYS_ON_COUNTER_L,
> +			    REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
>   
>   	mutex_unlock(&a6xx_gpu->gmu.lock);
>   
> 

  reply	other threads:[~2023-05-17 18:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-17 16:50 [PATCH 0/6] Adreno QoL changes Konrad Dybcio
2023-05-17 16:50 ` [PATCH 1/6] drm/msm/a6xx: Explain CP_PROTECT_CNTL writes in a6xx_set_cp_protect Konrad Dybcio
2023-05-17 16:50 ` [PATCH 2/6] drm/msm/a6xx: Skip empty protection ranges entries Konrad Dybcio
2023-05-17 16:50 ` [PATCH 3/6] drm/msm/a6xx: Ensure clean GMU state in a6xx_gmu_fw_start Konrad Dybcio
2023-05-17 16:50 ` [PATCH 4/6] drm/msm/a6xx: Improve GMU force shutdown sequence Konrad Dybcio
2023-05-17 22:19   ` kernel test robot
2023-05-17 16:50 ` [PATCH 5/6] drm/msm/a6xx: Use GMU_ALWAYS_ON_COUNTER for GMU-equipped GPUs in timestamp Konrad Dybcio
2023-05-17 18:09   ` Jonathan Marek [this message]
2023-05-17 19:08     ` [Freedreno] " Konrad Dybcio
2023-05-17 20:33       ` Jonathan Marek
2023-05-17 16:50 ` [PATCH 6/6] drm/msm/a6xx: Fix up GMU region reservations Konrad Dybcio

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