From: Marek Vasut <marek.vasut@gmail.com>
To: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
linux-mtd@lists.infradead.org
Cc: computersforpeace@gmail.com, dwmw2@infradead.org,
boris.brezillon@free-electrons.com, richard@nod.at,
linux-kernel@vger.kernel.org,
Cyrille Pitchen <cyrille.pitchen@atmel.com>
Subject: Re: [PATCH v8 3/4] mtd: spi-nor: introduce Double Transfer Rate (DTR) SPI protocols
Date: Tue, 25 Apr 2017 22:26:06 +0200 [thread overview]
Message-ID: <aaabe07a-fd00-8156-7082-3200238a0d60@gmail.com> (raw)
In-Reply-To: <44562d5d511d8fef8c21ea7e10f32cf727b147b8.1493149757.git.cyrille.pitchen@wedev4u.fr>
On 04/25/2017 10:08 PM, Cyrille Pitchen wrote:
> From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
>
> This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
> DTR is used only for Fast Read operations.
>
> According to manufacturer datasheets, whatever the number of I/O lines
> used during instruction (x) and address/mode/dummy (y) clock cycles, DTR
> is used only during data (z) clock cycles of SPI x-y-z protocols.
>
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2017-04-25 20:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-25 20:08 [PATCH v8 0/4] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories Cyrille Pitchen
2017-04-25 20:08 ` [PATCH v8 1/4] mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols Cyrille Pitchen
2017-04-25 20:25 ` Marek Vasut
2017-04-25 21:47 ` Cyrille Pitchen
2017-04-25 20:08 ` [PATCH v8 2/4] mtd: m25p80: add support of SPI 1-2-2 and " Cyrille Pitchen
2017-04-25 20:08 ` [PATCH v8 3/4] mtd: spi-nor: introduce Double Transfer Rate (DTR) SPI protocols Cyrille Pitchen
2017-04-25 20:26 ` Marek Vasut [this message]
2017-04-25 20:08 ` [PATCH v8 4/4] mtd: spi-nor: introduce Octo " Cyrille Pitchen
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