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Fri, 05 Dec 2025 05:59:01 -0800 (PST) X-Google-Smtp-Source: AGHT+IHIN17bdoUP6uMMUJ7SDlvyxo7Bng7d1r0V3Z/Gg3ZRXNxJiMHZaodSHJ8uBr3BUf6qxSgK7g== X-Received: by 2002:a05:6a21:6d9b:b0:366:14ac:8c6a with SMTP id adf61e73a8af0-36614ac8db5mr264873637.64.1764943141147; Fri, 05 Dec 2025 05:59:01 -0800 (PST) Received: from [192.168.1.4] ([106.222.235.197]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-bf6a2745c43sm4855199a12.29.2025.12.05.05.58.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Dec 2025 05:59:00 -0800 (PST) Message-ID: Date: Fri, 5 Dec 2025 19:28:52 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/8] dt-bindings: display/msm: gpu: Document A612 GPU To: Krzysztof Kozlowski Cc: Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Jessica Zhang , Gaurav Kohli , Dan Carpenter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jie Zhang References: <20251204-qcs615-spin-2-v4-0-f5a00c5b663f@oss.qualcomm.com> <20251204-qcs615-spin-2-v4-3-f5a00c5b663f@oss.qualcomm.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=ZqDg6t7G c=1 sm=1 tr=0 ts=6932e526 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=jBSxni06C9HboLYAjQ55wg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=fzXiC-7nnnm7XjcqKBIA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA1MDA5OSBTYWx0ZWRfX1PRMdir4Dqkc aqmaR+bt86r1YAMA9aSXVtc9nE36yL+mjTFBmGLaE2VdODkDYrPPuxHBIEaSGoZfgr+oGdh9Lc7 kHn9jUJ7/BXGQaP8eyd+hRp2jgTm12AS68Ve0nl6++WPW4eLGDWkdBzBiLYunav+awavoeUCslc X3rrdbbdnErhlp/3+4kZwL9qZtfmFT1dDcdm1kC9tLhzwPcY7zxnKEtcFl09euCKbtgFmUd7Xz0 HVXTIprLIiT3e+KqCtaxvHQIsu31OPpYtp2LmnpdJovor6teYlCa++CEatNzGTKC0Tkc2nzU53X LVoSazwU7LVnOYLZN9eZrf7trqz4L+ga3p1tPo07d+SNPLCYKZ0xVmvaV//tPdY9jrNz/u7CZ9V IK+3O0mevj2S8Z6ryeCZJrqseSdJxA== X-Proofpoint-ORIG-GUID: KQodtlopQp0DCSIm12XJdSFYcLmFKnWp X-Proofpoint-GUID: KQodtlopQp0DCSIm12XJdSFYcLmFKnWp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-05_05,2025-12-04_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 bulkscore=0 impostorscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512050099 On 12/4/2025 9:04 PM, Krzysztof Kozlowski wrote: > On 04/12/2025 14:21, Akhil P Oommen wrote: >> >> clocks: >> - minItems: 2 >> + minItems: 1 >> maxItems: 7 >> >> clock-names: >> - minItems: 2 >> + minItems: 1 >> maxItems: 7 >> >> reg: >> @@ -388,6 +388,32 @@ allOf: >> - clocks >> - clock-names >> >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: qcom,adreno-612.0 >> + then: >> + properties: >> + clocks: >> + items: >> + - description: GPU Core clock >> + >> + clock-names: >> + items: >> + - const: core >> + >> + reg-names: >> + minItems: 1 >> + items: >> + - const: kgsl_3d0_reg_memory >> + - const: cx_mem >> + - const: cx_dbgc > > The patch overall gets better, thanks, but I think I asked about this > already - why you don't have the list strict? I don't see reason for > making list flexible and I don't see the explanation in the commit msg. > Either this should be fixed-size (so minItems: 3 and same for reg:) or > you should document reasons WHY in the commit msg. Otherwise next time I > will ask the same. :( TBH, I was just following the convention I saw for the other entries here. We can make it more strict. But I am curious, in which case are num reg ranges flexible usually? Just to confirm, we should add this here for adreno-612.0: reg: minItems: 3 maxItems: 3 reg-names: minItems: 3 items: - const: kgsl_3d0_reg_memory - const: cx_mem - const: cx_dbgc -Akhil> > > Best regards, > Krzysztof