Re: [PATCH v2 2/2] arm64: dts: ti: phycore-am64: Add PMIC

[Wadim Egorov <w.egorov@phytec.de>]

Hi,

Am 29.04.24 um 21:58 schrieb Nathan Morrisson:
> Add a PMIC node to the phycore-am64 device tree.
> 
> Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>

Reviewed-by: Wadim Egorov <w.egorov@phytec.de>

Please enable the PMIC driver in the arm64 defconfig.

REGULATOR_LP873X & CONFIG_MFD_TI_LP873X

> ---
> v2: No change
> 
>   .../boot/dts/ti/k3-am64-phycore-som.dtsi      | 44 +++++++++++++++++++
>   1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> index 125e507966fb..2c3b20ddfb8b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> @@ -265,6 +265,50 @@ i2c_som_rtc: rtc@52 {
>   		interrupts = <70 IRQ_TYPE_EDGE_FALLING>;
>   		wakeup-source;
>   	};
> +
> +	pmic@61 {
> +		compatible = "ti,lp8733";
> +		reg = <0x61>;
> +
> +		buck0-in-supply = <&vcc_5v0_som>;
> +		buck1-in-supply = <&vcc_5v0_som>;
> +		ldo0-in-supply = <&vdd_3v3>;
> +		ldo1-in-supply = <&vdd_3v3>;
> +
> +		regulators {
> +			vdd_core: buck0 {
> +				regulator-name = "VDD_CORE";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt = <750000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +			};
> +
> +			vdd_3v3: buck1 {
> +				regulator-name = "VDD_3V3";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +			};
> +
> +			vdd_1v8_ldo0: ldo0 {
> +				regulator-name = "VDD_1V8_LDO0";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +			};
> +
> +			vdda_1v8: ldo1 {
> +				regulator-name = "VDDA_1V8";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +			};
> +		};
> +	};
>   };
>   
>   &main_r5fss0_core0 {