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From: James Clark <james.clark@linaro.org>
To: Leo Yan <leo.yan@arm.com>
Cc: Ingo Molnar <mingo@kernel.org>,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-doc@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@arm.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Yeoreum Yun <yeoreum.yun@arm.com>,
	Jonathan Corbet <corbet@lwn.net>, Suyash Mahar <smahar@meta.com>,
	Amir Ayupov <aaupov@fb.com>
Subject: Re: [PATCH 12/25] coresight: trbe: Track per-CPU sink interrupt handling
Date: Mon, 19 Oct 2026 12:54:11 +0100	[thread overview]
Message-ID: <aadce723-2a51-4d57-8d16-03a101d1a93f@linaro.org> (raw)
In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-12-35cf6f297d20@arm.com>



On 15/09/2026 16:48, Leo Yan wrote:
> A sampling NMI can interrupt TRBE while it is using the active AUX
> handle or buffer. Circular buffer mode avoids wrap interrupts but can
> still generate fault interrupts.
> 
> Add an in_interrupt flag to per-CPU sinks and set it around the TRBE IRQ
> handler. Compiler barriers keep AUX buffer accesses between the flag
> updates. This lets NMI callbacks detect when they have interrupted sink
> handling before modifying its state.
> 
> Assisted-by: Codex:gpt-6
> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
>   drivers/hwtracing/coresight/coresight-trbe.c | 17 ++++++++++++++++-
>   include/linux/coresight.h                    |  2 ++
>   2 files changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
> index ab3c5c7d27f3d272b07eade1e6452559808b196c..8eb625d3fc99db57a18e35ef59ef814dacf20a09 100644
> --- a/drivers/hwtracing/coresight/coresight-trbe.c
> +++ b/drivers/hwtracing/coresight/coresight-trbe.c
> @@ -1185,7 +1185,7 @@ static u64 cpu_prohibit_trace(void)
>   	return trfcr;
>   }
>   
> -static irqreturn_t arm_trbe_irq_handler(int irq, void *dev)
> +static irqreturn_t __arm_trbe_irq_handler(int irq, void *dev)
>   {
>   	struct perf_output_handle **handle_ptr = dev;
>   	struct perf_output_handle *handle = *handle_ptr;
> @@ -1249,6 +1249,21 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev)
>   	return IRQ_HANDLED;
>   }
>   
> +static irqreturn_t arm_trbe_irq_handler(int irq, void *dev)
> +{
> +	struct coresight_device *csdev = coresight_get_percpu_sink(smp_processor_id());
> +	irqreturn_t ret;
> +
> +	/* Circular Buffer mode can still interrupt on a fault. */
> +	WRITE_ONCE(csdev->in_interrupt, true);
> +	barrier();
> +	ret = __arm_trbe_irq_handler(irq, dev);
> +	barrier();
> +	WRITE_ONCE(csdev->in_interrupt, false);
> +
> +	return ret;
> +}
> +
>   static int arm_trbe_save(struct coresight_device *csdev)
>   {
>   	struct trbe_cpudata *cpudata = dev_get_drvdata(&csdev->dev);
> diff --git a/include/linux/coresight.h b/include/linux/coresight.h
> index ddf18c970e343041787424c2019f2b5dd49154c2..8830c30be0df53a22525ef4fc3c7e41a0ec6fd90 100644
> --- a/include/linux/coresight.h
> +++ b/include/linux/coresight.h
> @@ -275,6 +275,7 @@ struct coresight_trace_id_map {
>    *		when a source has been selected and a path is enabled from
>    *		source to that sink. A sink can also become enabled but not
>    *		activated if it's used via Perf.
> + * @in_interrupt: Per-CPU sink interrupt handler is running.
>    * @ea:		Device attribute for sink representation under PMU directory.
>    * @def_sink:	cached reference to default sink found for this device.
>    * @nr_links:   number of sysfs links created to other components from this
> @@ -299,6 +300,7 @@ struct coresight_device {
>   	bool orphan;
>   	/* sink specific fields */
>   	bool sysfs_sink_activated;
> +	bool in_interrupt;
>   	struct dev_ext_attribute *ea;
>   	struct coresight_device *def_sink;
>   	struct coresight_trace_id_map perf_sink_id_map;
> 
Reviewed-by: James Clark <james.clark@linaro.org>


  reply	other threads:[~2026-10-19 11:54 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 15:48 [PATCH 00/25] CoreSight / perf: Support AUX sampling Leo Yan
2026-09-15 15:48 ` [PATCH 01/25] perf/core: Reject non-positive AUX snapshot sizes Leo Yan
2026-10-16 13:14   ` James Clark
2026-09-15 15:48 ` [PATCH 02/25] perf/core: Prevent AUX sampling from racing with pause/resume Leo Yan
2026-10-16 13:29   ` James Clark
2026-09-15 15:48 ` [PATCH 03/25] perf/core: Export output copy helpers for CoreSight Leo Yan
2026-10-16 13:30   ` James Clark
2026-09-15 15:48 ` [PATCH 04/25] coresight: perf: End AUX output when an event is throttled Leo Yan
2026-10-16 13:46   ` James Clark
2026-09-15 15:48 ` [PATCH 05/25] coresight: perf: Extract AUX buffer update helper Leo Yan
2026-10-16 13:53   ` James Clark
2026-09-15 15:48 ` [PATCH 06/25] coresight: perf: Simplify flow for CPUs without a path Leo Yan
2026-10-16 13:59   ` James Clark
2026-09-15 15:48 ` [PATCH 07/25] coresight: perf: Validate the live context through its path Leo Yan
2026-10-19  9:25   ` James Clark
2026-09-15 15:48 ` [PATCH 08/25] coresight: perf: Validate context before resuming trace Leo Yan
2026-10-19  9:27   ` James Clark
2026-09-15 15:48 ` [PATCH 09/25] coresight: perf: Improve hardware state transitions Leo Yan
2026-10-19  9:33   ` James Clark
2026-10-19  9:35   ` James Clark
2026-09-15 15:48 ` [PATCH 10/25] coresight: trbe: Pad snapshot buffers Leo Yan
2026-10-19  9:45   ` James Clark
2026-09-15 15:48 ` [PATCH 11/25] coresight: trbe: Use circular buffer mode for snapshots Leo Yan
2026-10-19 10:13   ` James Clark
2026-09-15 15:48 ` [PATCH 12/25] coresight: trbe: Track per-CPU sink interrupt handling Leo Yan
2026-10-19 11:54   ` James Clark [this message]
2026-09-15 15:48 ` [PATCH 13/25] coresight: trbe: Handle an already disabled sink Leo Yan
2026-10-19 12:44   ` James Clark
2026-09-15 15:49 ` [PATCH 14/25] coresight: perf: Look up the trace path in etm_event_pause() Leo Yan
2026-10-19 12:46   ` James Clark
2026-09-15 15:49 ` [PATCH 15/25] coresight: perf: Serialize AUX pause and resume with event stops Leo Yan
2026-10-19 13:02   ` James Clark
2026-09-15 15:49 ` [PATCH 16/25] coresight: perf: Support AUX sampling with per-CPU sinks Leo Yan
2026-10-20 13:21   ` James Clark
2026-09-15 15:49 ` [PATCH 17/25] perf cs-etm: Allow history collection for samples with zero IP Leo Yan
2026-10-20 13:23   ` James Clark
2026-09-15 15:49 ` [PATCH 18/25] perf cs-etm: Unify timeless buffer decoding Leo Yan
2026-10-20 14:15   ` James Clark
2026-09-15 15:49 ` [PATCH 19/25] perf cs-etm: Propagate errors from trace queue flushing Leo Yan
2026-09-15 15:49 ` [PATCH 20/25] perf cs-etm: Drain pending packets before finishing trace blocks Leo Yan
2026-09-15 15:49 ` [PATCH 21/25] perf cs-etm: Complete packet draining with end of trace Leo Yan
2026-09-15 15:49 ` [PATCH 22/25] perf cs-etm: Centralize sample history collection Leo Yan
2026-09-15 15:49 ` [PATCH 23/25] perf cs-etm: Decode AUX samples into callchains and branch stacks Leo Yan
2026-10-20 14:13   ` James Clark
2026-09-15 15:49 ` [PATCH 24/25] perf test: Add CoreSight AUX sample decoding test Leo Yan
2026-10-20 14:35   ` James Clark
2026-09-15 15:49 ` [PATCH 25/25] Documentation: coresight: Document AUX sample decoding Leo Yan
2026-10-20 14:26   ` James Clark

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