Re: [PATCH v2 2/3] can: mcp251xfd: add support for XSTBYEN transceiver standby control

[Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>]

On 3/16/2026 7:21 PM, Marc Kleine-Budde wrote:
> On 16.03.2026 18:49:49, Viken Dadhaniya wrote:
>> The MCP251xFD has a dedicated transceiver standby control function on
>> the INT0/GPIO0/XSTBY pin, controlled by the XSTBYEN bit in IOCON.
> 
> Please add a check to mcp251xfd_gpio_request() that GPIO0 cannot be used
> with xstbyen.

Sure, Will update in next patch.

> 
>> When enabled, the hardware automatically manages the transceiver
>> standby state: the pin is driven low when the controller is active
>> and high when it enters Sleep mode.
>>
>> Enable this feature when the 'microchip,xstbyen' device tree property
>> is present.
>>
>> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
>> ---
>>  .../net/can/spi/mcp251xfd/mcp251xfd-core.c    | 30 +++++++++++++++++++
>>  drivers/net/can/spi/mcp251xfd/mcp251xfd.h     |  1 +
>>  2 files changed, 31 insertions(+)
>>
>> diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
>> index 9c86df08c2c5..7a152acf4931 100644
>> --- a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
>> +++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
>> @@ -764,6 +764,29 @@ static void mcp251xfd_chip_stop(struct mcp251xfd_priv *priv,
>>  	mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
>>  }
>>
>> +static int mcp251xfd_chip_xstbyen_enable(const struct mcp251xfd_priv *priv)
>> +{
>> +	/* Configure the INT0/GPIO0/XSTBY pin as transceiver standby control:
>> +	 *
>> +	 * - XSTBYEN=1: route the pin to the transceiver standby function
>> +	 * - TRIS0=0:   set output direction; the reset default is 1 (input),
>> +	 *              which leaves the pin floating HIGH and keeps the
>> +	 *              transceiver in standby regardless of XSTBYEN
>> +	 * - LAT0=0:    drive pin LOW => transceiver active (not in standby)
>> +	 *
>> +	 * All three bits are included in the mask; only XSTBYEN is set in
>> +	 * val, so TRIS0 and LAT0 are cleared to 0 atomically.
>> +	 *
>> +	 * Once configured, the hardware automatically drives the pin HIGH
>> +	 * on Sleep mode entry and LOW on Sleep mode exit.
>> +	 */
> 
> What does the pin do in Config mode?

In Config mode, the pin is controlled by LAT0. Since we set LAT0=0,
the pin is LOW (transceiver active), ensuring the transceiver is
ready before entering Normal mode.

> 
>> +	return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
>> +				  MCP251XFD_REG_IOCON_XSTBYEN |
>> +				  MCP251XFD_REG_IOCON_TRIS0 |
>> +				  MCP251XFD_REG_IOCON_LAT0,
>> +				  MCP251XFD_REG_IOCON_XSTBYEN);
>> +}
>> +
>>  static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)
>>  {
>>  	int err;
>> @@ -800,6 +823,12 @@ static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)
>>  	if (err)
>>  		goto out_chip_stop;
>>
>> +	if (priv->xstbyen) {
>> +		err = mcp251xfd_chip_xstbyen_enable(priv);
>> +		if (err)
>> +			goto out_chip_stop;
>> +	}
>> +
> 
> You should configure the pin before bringing the controller into normale mode.

Sure, Will update in next patch.

> 
> regards,
> Marc
>