From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C27A2494FF for ; Fri, 6 Mar 2026 04:25:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772771157; cv=none; b=k+lVSj6/c1BRTUP49brhlXl1u7cJ2nxPuM/6VIVRPE/U+1cRr8SOsqHr2TkUVDseoyOQlzvjy5BieoN04/nSQtdvXIP+4MjFKmKiEe8Ea6Jl6btbnNfpObXrDhrOk111zXgXYCbuCp2PfG1qVhpfv0WF1tQzqoVmyqD+cNOretk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772771157; c=relaxed/simple; bh=nI4O3yo3OgvcBFCtOCyteWxm8G17BbXO1No4hDkRiek=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Ln1nr81Hhp7NTDyu1uFQM/02oOXWfXUZCoH9Jd21jVIrP9EGOsR0QxB2ovJvXNKboQO9fDDdSVredbulfSZ+9hiMILwSW+ckBHg2RfzNtr+oKdg749ddlHpSogZbp3y7OCtKXQdCiXo2VvsMGp4MyRi27jqyniu4hXvYRuJcccM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=aFzYSKfN; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="aFzYSKfN" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Transfer-Encoding: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date: Sender:Reply-To:Content-ID:Content-Description; bh=jvulmaWHVHLTxELsaUcupjwHmyR9DBqU5/UhJVjUTkk=; b=aFzYSKfNpDK4g1CCGvw7X8T2jh fISPftxcZZHFmW/uVYj00QjQoeOE+cnxCCfNGf60xcAITo155VewGg8b94KHAJDmgSmxDFO2xybGm lS9KOpNbj3XTlNAgb2fA1YpjhDE8FN/l3OVKD83XpfLFxTVQpOieJ3IMP0XnnrB3IRERiRApue4lg IdqoYajTIgG3LUGOW+QUYzwKSVc1bAPidLbWXo4yK4LXIhi9nuTQLcc/2qb5TalHrcpKGAtk2TQV7 IhT7WXpVDek3hi1swmixTb654rh4P0qCodoYra7NlWmKoya92mTQQ1VcLMa/i8nueZDSJfFlNUaF3 4LBCnnHw==; Received: from willy by casper.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1vyMkv-0000000G8pR-0PfW; Fri, 06 Mar 2026 04:25:41 +0000 Date: Fri, 6 Mar 2026 04:25:40 +0000 From: Matthew Wilcox To: Yin Tirui Cc: =?iso-8859-1?Q?J=FCrgen_Gro=DF?= , linux-kernel@vger.kernel.org, linux-mm@kvack.org, x86@kernel.org, linux-arm-kernel@lists.infradead.org, david@kernel.org, catalin.marinas@arm.com, will@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, luto@kernel.org, peterz@infradead.org, akpm@linux-foundation.org, lorenzo.stoakes@oracle.com, ziy@nvidia.com, baolin.wang@linux.alibaba.com, Liam.Howlett@oracle.com, npache@redhat.com, ryan.roberts@arm.com, dev.jain@arm.com, baohua@kernel.org, lance.yang@linux.dev, vbabka@suse.cz, rppt@kernel.org, surenb@google.com, mhocko@suse.com, anshuman.khandual@arm.com, rmclure@linux.ibm.com, kevin.brodsky@arm.com, apopple@nvidia.com, ajd@linux.ibm.com, pasha.tatashin@soleen.com, bhe@redhat.com, thuth@redhat.com, coxu@redhat.com, dan.j.williams@intel.com, yu-cheng.yu@intel.com, baolu.lu@linux.intel.com, conor.dooley@microchip.com, Jonathan.Cameron@huawei.com, riel@surriel.com, Kefeng Wang , chenjun102@huawei.com Subject: Re: [PATCH RFC v3 2/4] mm/pgtable: Make pfn_pte() filter out huge page attributes Message-ID: References: <20260228070906.1418911-1-yintirui@huawei.com> <20260228070906.1418911-3-yintirui@huawei.com> <5eaf3846-01db-471e-9903-b0b239d7838d@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Mar 05, 2026 at 05:38:46PM +0800, Yin Tirui wrote: > On 3/4/2026 3:52 PM, Jürgen Groß wrote: > > Today it can either be used for a large page (which should be a pmd, > > of course), or - much worse - you'd strip the _PAGE_PAT bit, which is > > at the same position in PTEs. > > > > So basically you are removing the ability to use some cache modes. > > > > NACK! > > > > > > Juergen > > Hi Willy and Jürgen, > > Following up on the x86 _PAGE_PSE and _PAGE_PAT aliasing issue. > > To achieve the goal of keeping pfn_pte() pure and completely eradicating the > pte_clrhuge() anti-pattern, we need a way to ensure pfn_pte() never receives > a pgprot with the huge bit set. > > @Jürgen: > Just to be absolutely certain: is there any safe way to filter out the huge > page attributes directly inside x86's pfn_pte() without breaking PAT? Or > does the hardware bit-aliasing make this strictly impossible at the > pfn_pte() level? > > @Willy @Jürgen: > Assuming it is impossible to filter this safely inside pfn_pte() on x86, we > must translate the pgprot before passing it down. To maintain strict > type-safety and still drop pte_clrhuge(), I plan to introduce two > arch-neutral wrappers: > > x86: > /* Translates large prot to 4K. Shifts PAT back to bit 7, inherently > clearing _PAGE_PSE */ > #define pgprot_huge_to_pte(prot) pgprot_large_2_4k(prot) > /* Translates 4K prot to large. Shifts PAT to bit 12, strictly sets > _PAGE_PSE */ > #define pgprot_pte_to_huge(prot) > __pgprot(pgprot_val(pgprot_4k_2_large(prot)) | _PAGE_PSE) I don't think we should have pgprot_large_2_4k(). Or rather, I think it should be embedded in pmd_pgprot() / pud_pgprot(). That is, we should have an 'ideal' pgprot which, on x86, perhaps matches that used by the 4k level. pfn_pmd() should be converting from the ideal pgprot to that actually used by PMDs (and setting _PAGE_PSE?) > arm64: > /* > * Drops Block marker, enforces Page marker. > * Strictly preserves the PTE_VALID bit to avoid validating PROT_NONE pages. > */ > #define pgprot_huge_to_pte(prot) \ >       __pgprot((pgprot_val(prot) & ~(PMD_TYPE_MASK & ~PTE_VALID)) | \ >              (PTE_TYPE_PAGE & ~PTE_VALID)) > /* > * Drops Page marker, sets Block marker. > * Strictly preserves the PTE_VALID bit. > */ > #define pgprot_pte_to_huge(prot) \ >       __pgprot((pgprot_val(prot) & ~(PTE_TYPE_MASK & ~PTE_VALID)) | \ >              (PMD_TYPE_SECT & ~PTE_VALID)) > > Usage: > 1. Creating a huge pfnmap (remap_try_huge_pmd) > pgprot_t huge_prot = pgprot_pte_to_huge(prot); > > /* No need for pmd_mkhuge() */ > pmd_t entry = pmd_mkspecial(pfn_pmd(pfn, huge_prot)); > set_pmd_at(mm, addr, pmd, entry); > > 2. Splitting a huge pfnmap (__split_huge_pmd_locked) > pgprot_t small_prot = pgprot_huge_to_pte(pmd_pgprot(old_pmd)); > > /* No need for pte_clrhuge() */ > pte_t entry = pfn_pte(pmd_pfn(old_pmd), small_prot); > set_ptes(mm, haddr, pte, entry, HPAGE_PMD_NR); > > > Willy, is there a better architectural approach to handle this and satisfy > the type-safety requirement given the x86 hardware constraints? > > -- > Thanks, > Yin Tirui > >