From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: kernel test robot <lkp@intel.com>,
Chen Wang <unicorn_wang@outlook.com>,
<oe-kbuild-all@lists.linux.dev>, <linux-kernel@vger.kernel.org>,
<s-vadapalli@ti.com>
Subject: Re: drivers/pci/controller/cadence/pci-j721e.c:648:undefined reference to `cdns_pcie_host_disable'
Date: Thu, 13 Nov 2025 14:59:11 +0530 [thread overview]
Message-ID: <ab085118e844cc173ba158171a08909a006f9abb.camel@ti.com> (raw)
In-Reply-To: <wwgrzgcdqralnyrhvufoldiyautpkp2d2chveovgnen5qvt4p6@l6xdmkezpdd2>
On Wed, 2025-11-12 at 23:01 +0530, Manivannan Sadhasivam wrote:
> On Tue, Nov 11, 2025 at 08:29:48PM +0530, Siddharth Vadapalli wrote:
> > On 11/11/25 7:39 PM, Manivannan Sadhasivam wrote:
> > > On Tue, Nov 11, 2025 at 05:09:25PM +0530, Siddharth Vadapalli wrote:
> > > > On Tue, 2025-11-11 at 16:24 +0530, Manivannan Sadhasivam wrote:
> > > >
> > > > Hello Mani,
> > > >
> > > > > + Siddharth
> > > >
> > > > Thank you for notifying me of this.
> > > >
> > > > >
> > > > > On Tue, Nov 11, 2025 at 05:28:54PM +0800, kernel test robot wrote:
> > > > > > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> > > > > > head: 4427259cc7f7571a157fbc9b5011e1ef6fe0a4a8
> > > > > > commit: 1c72774df028429836eec3394212f2921bb830fc PCI: sg2042: Add Sophgo SG2042 PCIe driver
> > > > > > date: 8 weeks ago
> > > > > > config: loongarch-randconfig-r113-20251110 (https://download.01.org/0day-ci/archive/20251111/202511111705.MZ7ls8Hm-lkp@intel.com/config)
> > > > > > compiler: loongarch64-linux-gcc (GCC) 15.1.0
> > > > > > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251111/202511111705.MZ7ls8Hm-lkp@intel.com/reproduce)
> > > > > >
> > > > > > If you fix the issue in a separate patch/commit (i.e. not just a new version of
> > > > > > the same patch/commit), kindly add following tags
> > > > > > > Reported-by: kernel test robot <lkp@intel.com>
> > > > > > > Closes: https://lore.kernel.org/oe-kbuild-all/202511111705.MZ7ls8Hm-lkp@intel.com/
> > > > > >
> > > > > > All errors (new ones prefixed by >>):
> > > > > >
> > > > > > loongarch64-linux-ld: drivers/pci/controller/cadence/pci-j721e.o: in function `j721e_pcie_remove':
> > > > > > > > drivers/pci/controller/cadence/pci-j721e.c:648:(.text+0x83c): undefined reference to `cdns_pcie_host_disable'
> > > > > >
> > > > >
> > > > > From .config:
> > > > >
> > > > > CONFIG_PCIE_CADENCE=y
> > > > > CONFIG_PCIE_CADENCE_HOST=m
> > > > > CONFIG_PCIE_CADENCE_EP=y
> > > > > CONFIG_PCIE_CADENCE_PLAT=y
> > > > > # CONFIG_PCIE_CADENCE_PLAT_HOST is not set
> > > > > CONFIG_PCIE_CADENCE_PLAT_EP=y
> > > > > CONFIG_PCIE_SG2042_HOST=m
> > > > > CONFIG_PCI_J721E=y
> > > > > # CONFIG_PCI_J721E_HOST is not set
> > > > > CONFIG_PCI_J721E_EP=y
> > > > >
> > > > > PCI_J721E selects PCIE_CADENCE_HOST only if PCI_J721E_HOST is selected,
> > > > > otherwise, it will not select it. This will take care of the dependency between
> > > > > PCI_J721E and PCIE_CADENCE_{HOST/EP}.
> > > > >
> > > > > But if PCIE_CADENCE_HOST is selected as a module by other drivers like,
> > > > > CONFIG_PCIE_SG2042_HOST=m, then if PCI_J721E is selected as a built-in using
> > > > > CONFIG_PCI_J721E_EP=y, it results in this build error as the built-in driver
> > > > > becomes dependent on a symbol from a loadable module.
> > > >
> > > > While I don't deny the build error associated with the above config, it is
> > > > an invalid config in the sense that the Glue drivers for two different
> > > > devices are being enabled. This seems to be a generic issue wherein
> > > > multiple drivers tend to depend on a library/common driver. How is it
> > > > handled in such cases?
> > >
> > > AFAIK, the common library should be built-in to avoid issues like this.
> >
> > Ok. If that is the usual approach then I have no objections to it.
> >
> > >
> > > > Is there a notion of reordering configs to ensure that such build errors
> > > > are avoided?
> > > >
> > > > If PCI_J721E_EP was selected as 'y' before 'PCI_SG2042_HOST' being selected
> > > > as 'm', it would have resulted in 'PCIE_CADENCE_EP' being selected as 'y'
> > > > and this won't cause a build error even with 'PCI_SG2042_HOST' selected as
> > > > 'm'.
> > > >
> > > > >
> > > > > I guess, we should force PCIE_CADENCE_{HOST/EP} to be 'bool' as it is getting
> > > > > selected by multiple drivers.
> > > >
> > > > This will defeat the purpose of the series that enabled loadable module
> > > > support for the pci-j721e.c driver and the pcie-cadence-host/ep.c drivers.
> > > >
> > >
> > > Your 'pci-j721e.c' can still be a loadable module, only the common library will
> > > be built-in, which is not that bad.
> >
> > Yes, this will work.
> >
> > Please let me know if you want me to post the patch to update
> > CONFIG_PCIE_CADENCE_{EP/HOST} to a bool.
> >
>
> Yes, please.
I have posted the patch at:
https://lore.kernel.org/r/20251113092721.3757387-1-s-vadapalli@ti.com
Regards,
Siddharth.
prev parent reply other threads:[~2025-11-13 9:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-11 9:28 kernel test robot
2025-11-11 10:54 ` Manivannan Sadhasivam
2025-11-11 11:39 ` Siddharth Vadapalli
2025-11-11 14:09 ` Manivannan Sadhasivam
2025-11-11 14:59 ` Siddharth Vadapalli
2025-11-12 17:31 ` Manivannan Sadhasivam
2025-11-13 9:29 ` Siddharth Vadapalli [this message]
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