From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9413634404F for ; Fri, 13 Mar 2026 09:59:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773395978; cv=none; b=RcPd7LC8Q6nqtt/cKIH46RYn0cMbXxzs7w8NGHTJjv97fAKP9AO+Pz1GL55feGZAkCWHUauBdboeSy0PR/I+zVopAyIJfZgRSUiC1tl2USOVa7p/U6lYCEvPzcNpGsNYM0N9aBU4snNjnY39kLoS0ULOtriJk6lR5F26Fz8tzxo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773395978; c=relaxed/simple; bh=3Hwr+ont4w/BD7mlW+ofiQxrWPPeCXEYAZKVZLss3pU=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=mRtXD7IXGKFLlepjGe4khiuJwNWRa3W6ShWwd3V5AbTj+lwZZB8597c4IGjh6TVipn+r8CC55DNvciqvrMCAmJIHMGDZ++oZxez4k4Ihwxqj2/weQPKKWFobyrbF32KKlX4q0eUZxz9GSI6qpYj5Lk72TnfVimz5fA7/0izR+vY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D33CE165C; Fri, 13 Mar 2026 02:59:30 -0700 (PDT) Received: from J2N7QTR9R3 (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BA0773F73B; Fri, 13 Mar 2026 02:59:35 -0700 (PDT) Date: Fri, 13 Mar 2026 09:59:30 +0000 From: Mark Rutland To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: Clear VTCR_EL2 in __init_el2_stage2() Message-ID: References: <20260313053857.1277828-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260313053857.1277828-1-anshuman.khandual@arm.com> On Fri, Mar 13, 2026 at 05:38:57AM +0000, Anshuman Khandual wrote: > Clear VTCR_EL2 along with VTTBR_EL2 register in __init_el2_stage2(), which > ensures that MMU stage-2 translation remain disabled. As Marc noted, that's not true -- whether stage 2 is enabled is governed entirely by HCR_EL2.VM. The only reason to initialize VTCR_EL2 here would be if some field in VTCR_EL2 applies when stage 2 is *disabled*. > Although clearing out VTTBR_EL2 probably should have been sufficient > but adding VTCR_EL2 improves overall safety. It's unhelpful to send patches like this with unclear or non-existent rationale, and vague statements about what the patch might do. Was there some specific reason to send this? e.g. * Did you have any specific reason to believe that setting some field in VTCR_EL2 was necessary? e.g. is there some misleading documentation, or comment elsewhere in the kernel? * Are you trying to fix some problem you've encountered, but haven't managed to debug? * Was this purely from inspection? Mark. > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: Oliver Upton > Cc: Mark Rutland > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual > --- > arch/arm64/include/asm/el2_setup.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index 85f4c1615472..2c88033591bb 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -189,6 +189,7 @@ > /* Stage-2 translation */ > .macro __init_el2_stage2 > msr vttbr_el2, xzr > + msr vtcr_el2, xzr > .endm > > /* GICv3 system register access */ > -- > 2.30.2 >