From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935299AbcJ0QYS (ORCPT ); Thu, 27 Oct 2016 12:24:18 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:22088 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932708AbcJ0QYM (ORCPT ); Thu, 27 Oct 2016 12:24:12 -0400 Subject: Re: [Xen-devel] [PATCH 8/8] xen/pvh: Enable CPU hotplug To: Andrew Cooper , david.vrabel@citrix.com, JGross@suse.com References: <1476468318-24422-1-git-send-email-boris.ostrovsky@oracle.com> <1476468318-24422-9-git-send-email-boris.ostrovsky@oracle.com> <846901a2-06c1-931f-9933-bda4696e2e40@oracle.com> <9e8a05ce-851f-ed9e-c5af-ad9cc84876a1@citrix.com> Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, roger.pau@citrix.com, Jan Beulich From: Boris Ostrovsky Message-ID: Date: Thu, 27 Oct 2016 12:23:20 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: <9e8a05ce-851f-ed9e-c5af-ad9cc84876a1@citrix.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Source-IP: userv0022.oracle.com [156.151.31.74] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/27/2016 11:00 AM, Andrew Cooper wrote: > On 27/10/16 15:25, Boris Ostrovsky wrote: >> >> >> On 10/14/2016 03:01 PM, Boris Ostrovsky wrote: >>> On 10/14/2016 02:41 PM, Andrew Cooper wrote: >>>> On 14/10/16 19:05, Boris Ostrovsky wrote: >>>>> PVH guests don't receive ACPI hotplug interrupts and therefore >>>>> need to monitor xenstore for CPU hotplug event. >>>> Why not? If they don't, they should. As we are providing ACPI anyway, >>>> we should provide all bits of it. >>> >>> We don't have IOAPIC, which is how these interrupts are typically >>> delivered. I suppose we might be able to specify it as something else. >>> >>> I'll look into this. >> >> >> (+Jan) >> >> Yes, we can do this. The main issue is how to deal with event >> registers (i.e FADT.x_pm1a_evt_blk) and AML's PRST region (which >> specifies online CPU map). >> >> Currently these are accessed via IO space and are handled by qemu. >> >> There are a couple of ways to deal with this that I can see. >> >> 1. We can implement ioreq handling in the hypervisor, there are only a >> few addresses that need handling. >> >> 2. We can implement those registers in memory space and have libxl >> update them them on a hotplug command. This appears to be possible >> because these registers mostly just consume writes without side >> effects so they can be simple memory locations. The one exception is >> updating status bits (they are cleared by writing 1s) but I think we >> can do this from the AML. >> >> Other than that the only other thing is setting up an event channel >> between the toolstack and the guest (either via xenstore or perhaps by >> having a reserved port for SCI). >> >> I have a prototype with (2) (except for the bit clearing part) but I >> want to hear comments on this approach before I write proper patches. > > Xen already deals with 1 for HVM guests. We should do the same for PVH > guests as well. OK. The reason I was a little hesitant to go that route was because I didn't want to add more code to hypervisor. But this is quite simpler than (2) --- we can keep all ACPI data common with HVM. > > -1 to anything involving looping a PVH dom0 back around to some entity > running inside dom0. This hotplug path would only be used by an unprivileged domain (i.e. the one whose ACPI data is created by the toolstack). But TBH I haven't thought about dom0 at all. And for that (1) is probably the only option. -boris