Re: [PATCH] [v2] coresight: funnel: inport schedule by priority can not take work

[Chao Xu <xuchao066@163.com>]

在 2026/10/27 23:14, Chao Xu 写道:
> The CoreSight SoC-600 TRM, section 10.11.2, PRIORITYCONTROL, a funnel
> rejects priority register writes whenever any port is enabled. The
> current sequence therefore prevent the configured priorities from
> taking effect. Write the priority register before enabling the
> first port.
>
> Signed-off-by: Chao Xu <xuchao066@163.com>
> ---
>   drivers/hwtracing/coresight/coresight-funnel.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c
> index 0abc11f0690c..500ff72a83c8 100644
> --- a/drivers/hwtracing/coresight/coresight-funnel.c
> +++ b/drivers/hwtracing/coresight/coresight-funnel.c
> @@ -62,13 +62,15 @@ static int dynamic_funnel_enable_hw(struct funnel_drvdata *drvdata, int port)
>   		rc = coresight_claim_device_unlocked(csdev);
>   		if (rc)
>   			goto done;
> +
> +		/* Update priorities while all ports are disabled */
> +		writel_relaxed(drvdata->priority, drvdata->base + FUNNEL_PRICTL);
>   	}
>   
>   	functl &= ~FUNNEL_HOLDTIME_MASK;
>   	functl |= FUNNEL_HOLDTIME;
>   	functl |= (1 << port);
>   	writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL);
> -	writel_relaxed(drvdata->priority, drvdata->base + FUNNEL_PRICTL);
>   done:
>   	CS_LOCK(drvdata->base);
>   	return rc;
Hi Leo, Suzuki,

Gentle ping on v2 of this patch, sent on Oct 27.

In v1 you suggested moving the priority write into the first-port
branch [1]; v2 implements exactly that, and adds the TRM reference
you asked for (SoC-600 TRM, PRIORITYCONTROL). It still applies
cleanly on top of the latest coresight/next.

[1] https://lore.kernel.org/lkml/20261027084133.GA766279@e132581.arm.com/

Thanks,
Chao