From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 126E52192F4; Sun, 18 Jan 2026 18:13:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760023; cv=none; b=h2cD3kiVhkwAsSa7Xh0v1Dyf60K9X+fIr3aiNaLKBIAKRNb+Lv7mSGBqcHQUD/PQO5Qgjjya9HeYvXCHGdLRr7LoP4bGZ3ohD2yB6EB7CYIkxU73Me1r8gmfpE9lQWceVEHJXchvhKYEMrLcbzMhIIdyQCePZRIdg5g7Qsh84xQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760023; c=relaxed/simple; bh=SRj8VTyNCJuXfdO4PLxPdiGX0WqsJya+URI9tLlcQTA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=hDUkv7zh16Dp1lc6Sr3r9RkfWZmsUVrFX0wWYV9lPQ8rndcyLcpIBYZRY9J88ySu+jN+IMTJVeMPIGn1xQ3DBj7PTUTYTL0jh9Ku6sh0CvoolGPf3XesjA1xzb45ZOHqEngk43+EYfWrI3sfO7j/c8vou+gxLk+DKMdeJadngOw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oPYeJ5hM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oPYeJ5hM" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 865A3C116D0; Sun, 18 Jan 2026 18:13:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768760022; bh=SRj8VTyNCJuXfdO4PLxPdiGX0WqsJya+URI9tLlcQTA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=oPYeJ5hMrQtzxAN3mO76UfN8ud0++kZ6LhS85zQUmishQfTL2Ny272Jl98jPXFjCf tt4XTo29ihyRxklF8Ej4wCDfdBO4OIy/PjOnwAmqfT8HnYwGtwIdM8GGLNHuXFMD3S A0qy50IVDCBnlMPocKA+6jt9MGB5H0xVtxl5TXt9T7a5ft4MF5gfhT4fySN+aiElJN md3TqKTdnVL/Dhw/vfWGbNMg85ql+j90YcOy3W5DIFF8pyVLzOlds45xjqYtxbbuNv jCe0uCELODhNVdLzoLXWvWbfsS+yt6aZ3UpNp95dq+Gu6iOSKvLqH5cZhhqbR+jLAs ByPp51hmRrHxg== Message-ID: Date: Sun, 18 Jan 2026 19:13:39 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] memory: tegra: Add support for DBB clock on Tegra264 To: Jon Hunter , Thierry Reding Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260116123732.140813-1-thierry.reding@gmail.com> <7510a358-608a-475f-9f71-50fa72a72d27@nvidia.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 16/01/2026 14:15, Jon Hunter wrote: > > On 16/01/2026 12:37, Thierry Reding wrote: >> From: Thierry Reding >> >> The DBB clock is needed by many IP blocks in order to access system >> memory via the data backbone. The memory controller and external memory >> controllers are the central place where these accesses are managed, so >> make sure that the clock can be controlled from the corresponding >> driver. >> >> Note that not all drivers fully register bandwidth requests, and hence >> the EMC driver doesn't have enough information to know when it's safe to >> switch the clock off, so for now it will be kept on permanently. >> >> Signed-off-by: Thierry Reding >> --- >> Changes in v2: >> - convert to dev_err_probe() (Krzysztof) >> >> drivers/memory/tegra/tegra186-emc.c | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/drivers/memory/tegra/tegra186-emc.c b/drivers/memory/tegra/tegra186-emc.c >> index dfddceecdd1a..03ebab6fbe68 100644 >> --- a/drivers/memory/tegra/tegra186-emc.c >> +++ b/drivers/memory/tegra/tegra186-emc.c >> @@ -22,6 +22,7 @@ struct tegra186_emc { >> struct tegra_bpmp *bpmp; >> struct device *dev; >> struct clk *clk; >> + struct clk *clk_dbb; >> >> struct tegra186_emc_dvfs *dvfs; >> unsigned int num_dvfs; >> @@ -328,6 +329,13 @@ static int tegra186_emc_probe(struct platform_device *pdev) >> goto put_bpmp; >> } >> >> + emc->clk_dbb = devm_clk_get_optional_enabled(&pdev->dev, "dbb"); This looks like new clock and I don't see it in the bindings. Are you sure this is not an undocumented ABI? In case this was asked last time, commit msg or changelog should briefly mention it, to avoid exactly that question. Best regards, Krzysztof