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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912bfdfe2bsm206780f8f.24.2025.03.05.17.05.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Mar 2025 17:05:52 -0800 (PST) Message-ID: Date: Thu, 6 Mar 2025 01:05:50 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 04/12] media: iris: Add internal buffer calculation for HEVC and VP9 decoders To: Dikshita Agarwal , quic_vgarodia@quicinc.com, quic_abhinavk@quicinc.com, mchehab@kernel.org Cc: hverkuil@xs4all.nl, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250305104335.3629945-1-quic_dikshita@quicinc.com> <20250305104335.3629945-5-quic_dikshita@quicinc.com> Content-Language: en-US From: Bryan O'Donoghue In-Reply-To: <20250305104335.3629945-5-quic_dikshita@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 05/03/2025 10:43, Dikshita Agarwal wrote: > Add internal buffer count and size calculations for HEVC and VP9 > decoders. > > Signed-off-by: Dikshita Agarwal > --- > .../media/platform/qcom/iris/iris_buffer.c | 3 + > .../platform/qcom/iris/iris_vpu_buffer.c | 397 +++++++++++++++++- > .../platform/qcom/iris/iris_vpu_buffer.h | 46 +- > 3 files changed, 432 insertions(+), 14 deletions(-) > > diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media/platform/qcom/iris/iris_buffer.c > index e5c5a564fcb8..8c9d5b7fe75c 100644 > --- a/drivers/media/platform/qcom/iris/iris_buffer.c > +++ b/drivers/media/platform/qcom/iris/iris_buffer.c > @@ -205,6 +205,9 @@ static u32 iris_bitstream_buffer_size(struct iris_inst *inst) > if (num_mbs > NUM_MBS_4K) { > div_factor = 4; > base_res_mbs = caps->max_mbpf; > + } else { > + if (inst->codec == V4L2_PIX_FMT_VP9) > + div_factor = 1; > } > > /* > diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c > index dce25e410d80..13ee93356bcb 100644 > --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c > +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c > @@ -31,6 +31,42 @@ static u32 hfi_buffer_bin_h264d(u32 frame_width, u32 frame_height, u32 num_vpp_p > return size_h264d_hw_bin_buffer(n_aligned_w, n_aligned_h, num_vpp_pipes); > } > > +static u32 size_h265d_hw_bin_buffer(u32 frame_width, u32 frame_height, u32 num_vpp_pipes) > +{ > + u32 product = frame_width * frame_height; > + u32 size_yuv, size_bin_hdr, size_bin_res; > + > + size_yuv = (product <= BIN_BUFFER_THRESHOLD) ? > + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : ((product * 3) >> 1); When I read this code I have no way of knowing if it makes sense. #define BIN_BUFFER_THRESHOLD (1280 * 736) ((BIN_BUFFER_THRESHOLD * 3) >> 1) How/why is that correct ? > + size_bin_hdr = size_yuv * H265_CABAC_HDR_RATIO_HD_TOT; > + size_bin_res = size_yuv * H265_CABAC_RES_RATIO_HD_TOT; > + size_bin_hdr = ALIGN(size_bin_hdr / num_vpp_pipes, DMA_ALIGNMENT) * num_vpp_pipes; > + size_bin_res = ALIGN(size_bin_res / num_vpp_pipes, DMA_ALIGNMENT) * num_vpp_pipes; > + > + return size_bin_hdr + size_bin_res; > +} > + > +static u32 hfi_buffer_bin_vp9d(u32 frame_width, u32 frame_height, u32 num_vpp_pipes) > +{ > + u32 _size_yuv = ALIGN(frame_width, 16) * ALIGN(frame_height, 16) * 3 / 2; > + u32 _size = ALIGN(((max_t(u32, _size_yuv, ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * > + VPX_DECODER_FRAME_BIN_HDR_BUDGET / VPX_DECODER_FRAME_BIN_DENOMINATOR * > + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), DMA_ALIGNMENT) + > + ALIGN(((max_t(u32, _size_yuv, ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * > + VPX_DECODER_FRAME_BIN_RES_BUDGET / VPX_DECODER_FRAME_BIN_DENOMINATOR * > + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), DMA_ALIGNMENT); The size_yuv I guess just about makes sense but the _size component here is pretty hard to say whether or not this adds up. Could you please add some comments to describe the calculations in these complex size/alignment clauses. --- bod