From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94FEEC433EF for ; Tue, 14 Jun 2022 05:38:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240432AbiFNFiv (ORCPT ); Tue, 14 Jun 2022 01:38:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238226AbiFNFir (ORCPT ); Tue, 14 Jun 2022 01:38:47 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66B0C3818A; Mon, 13 Jun 2022 22:38:45 -0700 (PDT) X-UUID: d241220955ca479da4a5111005c1727c-20220614 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:08a58a04-d0d6-4a6e-988e-404764a934cf,OB:10,L OB:0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,AC TION:release,TS:50 X-CID-INFO: VERSION:1.1.6,REQID:08a58a04-d0d6-4a6e-988e-404764a934cf,OB:10,LOB :0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:50 X-CID-META: VersionHash:b14ad71,CLOUDID:c0aa8207-b57a-4a25-a071-bc7b4972bc68,C OID:034fae7212de,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: d241220955ca479da4a5111005c1727c-20220614 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 959328732; Tue, 14 Jun 2022 13:38:41 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 14 Jun 2022 13:38:39 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Tue, 14 Jun 2022 13:38:39 +0800 Message-ID: Subject: Re: [PATCH v11 07/12] drm/mediatek: dpi: move swap_shift to SoC config From: CK Hu To: Bo-Chen Chen , , , , , , , CC: , , , , , , , , , , Date: Tue, 14 Jun 2022 13:38:39 +0800 In-Reply-To: <20220613064841.10481-8-rex-bc.chen@mediatek.com> References: <20220613064841.10481-1-rex-bc.chen@mediatek.com> <20220613064841.10481-8-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Bo-Chen: On Mon, 2022-06-13 at 14:48 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet > > Add flexibility by moving the swap shift value to SoC specific > config. Reviewed-by: CK Hu > > Signed-off-by: Guillaume Ranquet > Signed-off-by: Bo-Chen Chen > Reviewed-by: Rex-BC Chen > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index afd81ae307da..2c0e9670c209 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -131,6 +131,7 @@ struct mtk_dpi_conf { > u32 dimension_mask; > /* HSIZE and VSIZE mask (no shift) */ > u32 hvsize_mask; > + u32 channel_swap_shift; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -349,7 +350,9 @@ static void mtk_dpi_config_channel_swap(struct > mtk_dpi *dpi, > break; > } > > - mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, > CH_SWAP_MASK); > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, > + val << dpi->conf->channel_swap_shift, > + CH_SWAP_MASK << dpi->conf->channel_swap_shift); > } > > static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool > enable) > @@ -821,6 +824,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .swap_input_support = true, > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > + .channel_swap_shift = CH_SWAP, > .limit = &mtk_dpi_limit, > }; > > @@ -835,6 +839,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .swap_input_support = true, > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > + .channel_swap_shift = CH_SWAP, > .limit = &mtk_dpi_limit, > }; > > @@ -848,6 +853,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .swap_input_support = true, > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > + .channel_swap_shift = CH_SWAP, > .limit = &mtk_dpi_limit, > }; > > @@ -861,6 +867,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .swap_input_support = true, > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > + .channel_swap_shift = CH_SWAP, > .limit = &mtk_dpi_limit, > }; >