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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Nadav Amit , Rik van Riel References: <6d67675458bfe4ac1ed792beec3ad93dd45848c7.1778695885.git.thomas.lendacky@amd.com> Content-Language: en-US Autocrypt: addr=thomas.lendacky@amd.com; keydata= xsFNBFaNZYkBEADxg5OW/ajpUG7zgnUQPsMqWPjeAxtu4YH3lCUjWWcbUgc2qDGAijsLTFv1 kEbaJdblwYs28z3chM7QkfCGMSM29JWR1fSwPH18WyAA84YtxfPD8bfb1Exwo0CRw1RLRScn 6aJhsZJFLKyVeaPO1eequEsFQurRhLyAfgaH9iazmOVZZmxsGiNRJkQv4YnM2rZYi+4vWnxN 1ebHf4S1puN0xzQsULhG3rUyV2uIsqBFtlxZ8/r9MwOJ2mvyTXHzHdJBViOalZAUo7VFt3Fb aNkR5OR65eTL0ViQiRgFfPDBgkFCSlaxZvc7qSOcrhol160bK87qn0SbYLfplwiXZY/b/+ez 0zBtIt+uhZJ38HnOLWdda/8kuLX3qhGL5aNz1AeqcE5TW4D8v9ndYeAXFhQI7kbOhr0ruUpA udREH98EmVJsADuq0RBcIEkojnme4wVDoFt1EG93YOnqMuif76YGEl3iv9tYcESEeLNruDN6 LDbE8blkR3151tdg8IkgREJ+dK+q0p9UsGfdd+H7pni6Jjcxz8mjKCx6wAuzvArA0Ciq+Scg hfIgoiYQegZjh2vF2lCUzWWatXJoy7IzeAB5LDl/E9vz72cVD8CwQZoEx4PCsHslVpW6A/6U NRAz6ShU77jkoYoI4hoGC7qZcwy84mmJqRygFnb8dOjHI1KxqQARAQABzSZUb20gTGVuZGFj a3kgPHRob21hcy5sZW5kYWNreUBhbWQuY29tPsLBmQQTAQoAQwIbIwcLCQgHAwIBBhUIAgkK CwQWAgMBAh4BAheAAhkBFiEE3Vil58OMFCw3iBv13v+a5E8wTVMFAmkbaKgFCRZQah8ACgkQ 3v+a5E8wTVPFyg//UYANiuHfxxJET8D6p/vIV0xYcf1SXCG78M+5amqcE/4cCIJWyAT3A1nP zwyQIaIjUlGsXQtNgC1uVteCnMNJCjVQm0nLlJ9IVtXxzRg0QKjuSdZxuL5jrIon4xW9hTJR 94i2v3Fx5UWyP2TB6qZOcB0jgh0l01GHF9/DVJbmQlpvQB4Z1uNv09Q7En6EXi28TSv0Ffd1 p8vKqxwz7CMeAeZpn5i7s1QE/mQtdkyAmhuGD12tNbWzFamrDD1Kq3Em4TIFko0+k5+oQAAf JFaZc1c0D4GtXwvv4y+ssI0eZuOBXapUHeNNVf3JGuF6ZPLNPAe5gMQrmsJinEArVYRQCuDA BZakbKw9YJpGhnSVeCl2zSHcVgXuDs4J2ONxdsGynYv5cjPb4XTYPaE1CZH7Vy1tqma8eErG rcCyP1seloaC1UQcp8UDAyEaBjh3EqvTvgl+SppHz3im0gPJgR9km95BA8iGx9zqDuceATBc +A007+XxdFIsifMGlus0DKPmNAJaLkEEUMedBBxH3bwQ+z8tmWHisCZQJpUeGkwttD1LK/xn KRnu8AQpSJBB2oKAX1VtLRn8zLQdGmshxvsLUkKdrNE6NddhhfULqufNBqul0rrHGDdKdTLr cK5o2dsf9WlC4dHU2PiXP7RCjs1E5Ke0ycShDbDY5Zeep/yhNWLOwU0EVo1liQEQAL7ybY01 hvEg6pOh2G1Q+/ZWmyii8xhQ0sPjvEXWb5MWvIh7RxD9V5Zv144EtbIABtR0Tws7xDObe7bb r9nlSxZPur+JDsFmtywgkd778G0nDt3i7szqzcQPOcR03U7XPDTBJXDpNwVV+L8xvx5gsr2I bhiBQd9iX8kap5k3I6wfBSZm1ZgWGQb2mbiuqODPzfzNdKr/MCtxWEsWOAf/ClFcyr+c/Eh2 +gXgC5Keh2ZIb/xO+1CrTC3Sg9l9Hs5DG3CplCbVKWmaL1y7mdCiSt2b/dXE0K1nJR9ZyRGO lfwZw1aFPHT+Ay5p6rZGzadvu7ypBoTwp62R1o456js7CyIg81O61ojiDXLUGxZN/BEYNDC9 n9q1PyfMrD42LtvOP6ZRtBeSPEH5G/5pIt4FVit0Y4wTrpG7mjBM06kHd6V+pflB8GRxTq5M 7mzLFjILUl9/BJjzYBzesspbeoT/G7e5JqbiLWXFYOeg6XJ/iOCMLdd9RL46JXYJsBZnjZD8 Rn6KVO7pqs5J9K/nJDVyCdf8JnYD5Rq6OOmgP/zDnbSUSOZWrHQWQ8v3Ef665jpoXNq+Zyob pfbeihuWfBhprWUk0P/m+cnR2qeE4yXYl4qCcWAkRyGRu2zgIwXAOXCHTqy9TW10LGq1+04+ LmJHwpAABSLtr7Jgh4erWXi9mFoRABEBAAHCwXwEGAEKACYCGwwWIQTdWKXnw4wULDeIG/Xe /5rkTzBNUwUCaRto5wUJFlBqXgAKCRDe/5rkTzBNUw4/EAClG106SeHXiJ+ka6aeHysDNVgZ 8pUbB2f8dWI7kzD5AZ5kLENnsi1MzJRYBwtg/vVVorZh6tavUwcIvsao+TnV57gXAWr6sKIc xyipxRVEXmHts22I6vL1DirLAoOLAwWilkM+JzbVE3MMvC+cCVnMzzchrMYDTqn1mjCCwiIe u5oop+K/RgeHYPsraumyA9/kj8iazrLM+lORukCNM7+wlRClcY8TGX+VllANym9B6FMxsJ5z Q7JeeXIgyGlcBRME+m3g40HfIl+zM674gjv2Lk+KjS759KlX27mQfgnAPX4tnjLcmpSQJ77I Qg+Azi/Qloiw7L/WsmxEO5ureFgGIYDQQUeM1Qnk76K5Z3Nm8MLHtjw3Q7kXHrbYn7tfWh4B 7w5Lwh6NoF88AGpUrosARVvIAd93oo0B9p40Or4c5Jao1qqsmmCCD0dl7WTJCboYTa2OWd99 oxS7ujw2t1WMPD0cmriyeaFZnT5cjGbhkA+uQGuT0dMQJdLqW3HRwWxyiGU/jZUFjHGFmUrj qFAgP+x+ODm6/SYn0LE0VLbYuEGfyx5XcdNnSvww1NLUxSvuShcJMII0bSgP3+KJtFqrUx9z l+/NCGvn/wMy6NpYUpRSOmsqVv0N71LbtXnHRrJ42LzWiRW2I5IWsb1TfdMAyVToHPNaEb0i WiyqywZI5g== In-Reply-To: <6d67675458bfe4ac1ed792beec3ad93dd45848c7.1778695885.git.thomas.lendacky@amd.com> Content-Type: text/plain; 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On AMD CPUs that support > INVLPGB, broadcast TLB flushing remains active even though CR4.PCIDE > is off. > > There are two checks that decide whether the global ASID code runs, > mm_global_asid() and consider_global_asid(), that key off of the > X86_FEATURE_INVLPGB feature. Once an mm becomes active on more than > three CPUs, consider_global_asid() assigns it a global ASID, after which > flush_tlb_mm_range() takes the broadcast_tlb_flush() path. The > broadcast_tlb_flush() function calls invlpgb_flush_single_pcid_nosync() or > invlpgb_flush_user_nr_nosync() with kern_pcid(asid), which expands to > (asid + 1). Both helpers set INVLPGB_FLAG_PCID and place the non-zero > PCID into EDX[31:16] of the INVLPGB instruction. Issuing INVLPGB with > INVLPGB_FLAG_PCID (RAX[1]) and a non-zero PCID (RDX[27:16]) while > CR4.PCIDE is not set results in a #GP: > > Oops: general protection fault, kernel NULL pointer dereference 0x1: 0000 [#1] SMP NOPTI > CPU: 158 UID: 0 PID: 3119 Comm: snap Not tainted 7.1.0-rc3 #1 PREEMPT(full) > Hardware name: ... > RIP: 0010:broadcast_tlb_flush+0x9d/0x210 > Code: ... 89 da 48 83 c8 07 <0f> 01 fe eb 08 cc cc cc ... > RSP: 0000:ffa0000031217cb0 EFLAGS: 00010202 > RAX: 00007f8ee8540007 RBX: 0000000008070000 RCX: 0000000000000000 > RDX: 0000000000070000 RSI: 0000000000000001 RDI: 00007f8ee8540000 > RBP: ff110001189a0700 R08: 00007f8ee8541000 R09: 000000000000000c > R10: 000000000000000c R11: 0000000000070000 R12: ff1100c0433aec80 > R13: 0000000000000000 R14: 0000000000000008 R15: 0000000000000007 > FS: 00007f8ed3fff6c0(0000) GS:ff1100c0b7b8a000(0000) knlGS:0000000000000000 > CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 > CR2: 00007f8ee8540058 CR3: 00080001433af000 CR4: 0000000000751ef0 > PKRU: 55555554 > Call Trace: > > flush_tlb_mm_range+0xd8/0x220 > ptep_clear_flush+0x56/0x60 > wp_page_copy+0x293/0x6c0 > ? _raw_spin_unlock+0x15/0x30 > __handle_mm_fault+0x512/0x6d0 > handle_mm_fault+0x145/0x2a0 > do_user_addr_fault+0x187/0x6f0 > exc_page_fault+0x6a/0x180 > asm_exc_page_fault+0x22/0x30 > RIP: 0033:0x55c553ebc639 > Code: ... > RSP: 002b:00007f8ed3ffeaa8 EFLAGS: 00010246 > RAX: 00007f8ee8540058 RBX: 000055c554ff77b8 RCX: 00007f8ee853c1c8 > RDX: 0000000000000000 RSI: 000000c000062b20 RDI: 00007f8ee8540040 > RBP: 00007f8ed3ffeb00 R08: 0000000000006040 R09: 0000000000000005 > R10: 0000000000000004 R11: 00000000000001c0 R12: 0000000000000001 > R13: 0000005990100204 R14: 000000c000624fc0 R15: 3fffffffffffffff > > Modules linked in: ... > ---[ end trace 0000000000000000 ]--- > > Add an X86_FEATURE_PCID check to both mm_global_asid() and > consider_global_asid() so that the global ASID code is skipped when PCID > is disabled. No global ASID is ever allocated under "nopcid", > mm_global_asid() always returns 0, and broadcast_tlb_flush() is not > reachable. Per-mm flushes fall back to the IPI-based path. The remaining > INVLPGB users all pass a PCID value of zero without setting the > INVLPGB_FLAG_PCID flag and continue to use the broadcast TLB support. I'm not an expert in the TLB-related support so I'd appreciate if a bunch of eyes could be put on this to verify this is the proper approach. Thanks! Tom > > Fixes: 4afeb0ed1753 ("x86/mm: Enable broadcast TLB invalidation for multi-threaded processes") > Assisted-by: Claude:claude-opus-4.7 > Signed-off-by: Tom Lendacky > --- > arch/x86/include/asm/tlbflush.h | 3 ++- > arch/x86/mm/tlb.c | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h > index 0545fe75c3fa..c4a9ec78fe69 100644 > --- a/arch/x86/include/asm/tlbflush.h > +++ b/arch/x86/include/asm/tlbflush.h > @@ -272,7 +272,8 @@ static inline u16 mm_global_asid(struct mm_struct *mm) > { > u16 asid; > > - if (!cpu_feature_enabled(X86_FEATURE_INVLPGB)) > + if (!cpu_feature_enabled(X86_FEATURE_INVLPGB) || > + !cpu_feature_enabled(X86_FEATURE_PCID)) > return 0; > > asid = smp_load_acquire(&mm->context.global_asid); > diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c > index af43d177087e..e2ace9f056c9 100644 > --- a/arch/x86/mm/tlb.c > +++ b/arch/x86/mm/tlb.c > @@ -445,7 +445,8 @@ static bool mm_needs_global_asid(struct mm_struct *mm, u16 asid) > */ > static void consider_global_asid(struct mm_struct *mm) > { > - if (!cpu_feature_enabled(X86_FEATURE_INVLPGB)) > + if (!cpu_feature_enabled(X86_FEATURE_INVLPGB) || > + !cpu_feature_enabled(X86_FEATURE_PCID)) > return; > > /* Check every once in a while. */ > > base-commit: 1d5dcaa3bd65f2e8c9baa14a393d3a2dc5db7524