From: Viken Dadhaniya <quic_vdadhani@quicinc.com>
To: Bryan O'Donoghue <pure.logic@nexus-software.ie>,
<andersson@kernel.org>, <konrad.dybcio@linaro.org>,
<andi.shyti@kernel.org>, <linux-arm-msm@vger.kernel.org>,
<linux-i2c@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<vkoul@kernel.org>, <quic_bjorande@quicinc.com>,
<manivannan.sadhasivam@linaro.org>
Cc: <quic_msavaliy@quicinc.com>, <quic_vtanuku@quicinc.com>
Subject: Re: [V2] i2c: i2c-qcom-geni: Correct I2C TRE sequence
Date: Thu, 1 Feb 2024 15:53:48 +0530 [thread overview]
Message-ID: <ad0b0ce4-3f20-4268-ab86-165a9e8bfbff@quicinc.com> (raw)
In-Reply-To: <b94c4c9f-a3dd-40fb-a80e-569199e93ee2@nexus-software.ie>
On 1/30/2024 8:54 PM, Bryan O'Donoghue wrote:
> On 29/01/2024 06:10, Viken Dadhaniya wrote:
>> As per HPG(Hardware programming guide
>
> Since you are doing a V3 here, please amend this too.
>
> "As per HPG" means almost nothing outside of qcom.
>
> "As per Qualcomm's internal Hardware Programming Guide"
>
> Right thing to do to reference the document IMO but, you should make
> clear its an internal silicon specification that's not public.
>
> Also not sure the TRE description adds much.
>
> Just give a high level description of the sequences being out-of-order
> with respect to the hardware spec.
>
> ---
> bod
Updated commit log and provided TRE description with sequence in V3.
prev parent reply other threads:[~2024-02-01 10:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 6:10 Viken Dadhaniya
2024-01-29 23:24 ` Andi Shyti
2024-01-30 11:32 ` Bryan O'Donoghue
2024-02-01 10:17 ` Viken Dadhaniya
2024-01-29 23:49 ` Dmitry Baryshkov
2024-01-30 9:42 ` Andi Shyti
2024-02-01 10:21 ` Viken Dadhaniya
2024-02-01 10:19 ` Viken Dadhaniya
2024-01-30 15:24 ` Bryan O'Donoghue
2024-02-01 10:23 ` Viken Dadhaniya [this message]
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