From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Gilberto Conde <gilbertorconde@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] pinctrl: qcom: ipq5018: add missing pwm3 function on gpio13
Date: Mon, 21 Sep 2026 13:02:36 +0200 [thread overview]
Message-ID: <ad57e0f2-87fb-4259-b55f-a8b259b337b4@oss.qualcomm.com> (raw)
In-Reply-To: <20260921093419.2870168-1-gilbertorconde@gmail.com>
On 9/21/26 11:34 AM, Gilberto Conde wrote:
> GPIO13 supports the PWM3 function at mux select value 4, but the
> pingroup table leaves that slot empty and gpio13 is not listed in
> pwm3_groups. Selecting pwm3 on gpio13 is therefore rejected by the
> pinmux core:
>
> ipq5018-tlmm: invalid group "gpio13" for function "pwm3"
>
> The GL.iNet GL-X2000 drives its fan from PWM3 on this pin, and the
> vendor firmware muxes it with select value 4:
>
> gpio13 : out low func4 8mA no pull
>
> Add pwm3 to the fourth function slot of gpio13 and list gpio13 in
> pwm3_groups. With this the pin muxes as expected:
>
> pin 13 (GPIO_13): device 1941010.pwm function pwm3 group gpio13
>
> Fixes: 725d1c891658 ("pinctrl: qcom: Add IPQ5018 pinctrl driver")
> Signed-off-by: Gilberto Conde <gilbertorconde@gmail.com>
> ---
> drivers/pinctrl/qcom/pinctrl-ipq5018.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5018.c b/drivers/pinctrl/qcom/pinctrl-ipq5018.c
> index 03cfba9534f..84392fe258c 100644
> --- a/drivers/pinctrl/qcom/pinctrl-ipq5018.c
> +++ b/drivers/pinctrl/qcom/pinctrl-ipq5018.c
> @@ -563,7 +563,7 @@ static const char * const qdss_cti_trig_out_b1_groups[] = {
> };
>
> static const char * const pwm3_groups[] = {
> - "gpio45",
> + "gpio45", "gpio13",
nit: usually these are sorted but I don't think it matters..
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
> };
>
> static const char * const qdss_cti_trig_in_b1_groups[] = {
> @@ -689,7 +689,7 @@ static const struct msm_pingroup ipq5018_groups[] = {
> PINGROUP(10, blsp0_spi, blsp1_uart0, led0, gcc_plltest, qdss_tracedata_a, _, _, _, _),
> PINGROUP(11, blsp0_spi, blsp1_uart0, _, gcc_tlmm, qdss_tracedata_a, _, _, _, _),
> PINGROUP(12, blsp0_spi, blsp0_i2c, blsp1_uart0, _, gcc_plltest, qdss_tracedata_a, _, _, _),
> - PINGROUP(13, blsp0_spi, blsp0_i2c, blsp1_uart0, _, qdss_tracedata_a, _, _, _, _),
> + PINGROUP(13, blsp0_spi, blsp0_i2c, blsp1_uart0, pwm3, qdss_tracedata_a, _, _, _, _),
> PINGROUP(14, pcie0_clk, _, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
> PINGROUP(15, _, _, cri_trng1, qdss_tracedata_a, _, _, _, _, _),
> PINGROUP(16, pcie0_wake, _, _, cri_trng, qdss_tracedata_a, _, _, _, _),
next prev parent reply other threads:[~2026-09-21 11:02 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 9:34 Gilberto Conde
2026-09-21 11:02 ` Konrad Dybcio [this message]
2026-09-22 8:14 ` Bartosz Golaszewski
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